8feb694e8f6757e8a7ef99664152ab1fc33fa4f5 - toolchain/llvm-project

commit	8feb694e8f6757e8a7ef99664152ab1fc33fa4f5	[log] [tgz]
author	Duncan Sands <baldrick@free.fr>	Thu Jan 01 15:52:00 2009 +0000
committer	Duncan Sands <baldrick@free.fr>	Thu Jan 01 15:52:00 2009 +0000
tree	0990a42a47f947a29ec9988f3bf2b0d28cbe2cf3
parent	bcf15388abaed2a55ae772fd2ee5872662d13a8e [diff]

Fix PR3274: when promoting the condition of a BRCOND node,
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType.  In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).

llvm-svn: 61542

llvm/include/llvm/Target/TargetLowering.h[diff]
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp[diff]
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp[diff]
llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp[diff]
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp[diff]
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp[diff]
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp[diff]
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp[diff]
llvm/lib/Target/Alpha/AlphaISelLowering.cpp[diff]
llvm/lib/Target/Alpha/AlphaISelLowering.h[diff]
llvm/lib/Target/CellSPU/SPUISelLowering.cpp[diff]
llvm/lib/Target/CellSPU/SPUISelLowering.h[diff]
llvm/lib/Target/IA64/IA64ISelLowering.cpp[diff]
llvm/lib/Target/IA64/IA64ISelLowering.h[diff]
llvm/lib/Target/Mips/MipsISelLowering.cpp[diff]
llvm/lib/Target/Mips/MipsISelLowering.h[diff]
llvm/lib/Target/PowerPC/PPCISelLowering.cpp[diff]
llvm/lib/Target/PowerPC/PPCISelLowering.h[diff]
llvm/lib/Target/X86/X86ISelLowering.cpp[diff]
llvm/lib/Target/X86/X86ISelLowering.h[diff]
llvm/test/CodeGen/CellSPU/2009-01-01-BrCond.ll[Added - diff]

21 files changed

tree: 0990a42a47f947a29ec9988f3bf2b0d28cbe2cf3

clang/
llvm/