Revert "[PowerPC] Make no-PIC default to match GCC - LLVM"
This reverts commit r347069
llvm-svn: 347076
diff --git a/llvm/test/CodeGen/PowerPC/testComparesinesc.ll b/llvm/test/CodeGen/PowerPC/testComparesinesc.ll
index 6f7bb3c..a498f64 100644
--- a/llvm/test/CodeGen/PowerPC/testComparesinesc.ll
+++ b/llvm/test/CodeGen/PowerPC/testComparesinesc.ll
@@ -1,17 +1,16 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
@glob = common local_unnamed_addr global i8 0, align 1
define signext i32 @test_inesc(i8 signext %a, i8 signext %b) {
; CHECK-LABEL: test_inesc:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xor r3, r3, r4
+; CHECK: xor r3, r3, r4
; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
@@ -24,8 +23,7 @@
define signext i32 @test_inesc_sext(i8 signext %a, i8 signext %b) {
; CHECK-LABEL: test_inesc_sext:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xor r3, r3, r4
+; CHECK: xor r3, r3, r4
; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
@@ -39,8 +37,7 @@
define signext i32 @test_inesc_z(i8 signext %a) {
; CHECK-LABEL: test_inesc_z:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cntlzw r3, r3
+; CHECK: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: blr
@@ -52,8 +49,7 @@
define signext i32 @test_inesc_sext_z(i8 signext %a) {
; CHECK-LABEL: test_inesc_sext_z:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cntlzw r3, r3
+; CHECK: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: neg r3, r3
@@ -66,13 +62,11 @@
define void @test_inesc_store(i8 signext %a, i8 signext %b) {
; CHECK-LABEL: test_inesc_store:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xor r3, r3, r4
-; CHECK-NEXT: addis r5, r2, glob@toc@ha
-; CHECK-NEXT: cntlzw r3, r3
-; CHECK-NEXT: srwi r3, r3, 5
-; CHECK-NEXT: xori r3, r3, 1
-; CHECK-NEXT: stb r3, glob@toc@l(r5)
+; CHECK: xor r3, r3, r4
+; CHECK: cntlzw r3, r3
+; CHECK: srwi r3, r3, 5
+; CHECK: xori r3, r3, 1
+; CHECK: stb r3, 0(r4)
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i8 %a, %b
@@ -83,14 +77,12 @@
define void @test_inesc_sext_store(i8 signext %a, i8 signext %b) {
; CHECK-LABEL: test_inesc_sext_store:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xor r3, r3, r4
-; CHECK-NEXT: addis r5, r2, glob@toc@ha
-; CHECK-NEXT: cntlzw r3, r3
-; CHECK-NEXT: srwi r3, r3, 5
-; CHECK-NEXT: xori r3, r3, 1
-; CHECK-NEXT: neg r3, r3
-; CHECK-NEXT: stb r3, glob@toc@l(r5)
+; CHECK: xor r3, r3, r4
+; CHECK: cntlzw r3, r3
+; CHECK: srwi r3, r3, 5
+; CHECK: xori r3, r3, 1
+; CHECK: neg r3, r3
+; CHECK: stb r3, 0(r4)
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i8 %a, %b
@@ -101,12 +93,10 @@
define void @test_inesc_z_store(i8 signext %a) {
; CHECK-LABEL: test_inesc_z_store:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cntlzw r3, r3
-; CHECK-NEXT: addis r4, r2, glob@toc@ha
-; CHECK-NEXT: srwi r3, r3, 5
-; CHECK-NEXT: xori r3, r3, 1
-; CHECK-NEXT: stb r3, glob@toc@l(r4)
+; CHECK: cntlzw r3, r3
+; CHECK: srwi r3, r3, 5
+; CHECK: xori r3, r3, 1
+; CHECK: stb r3, 0(r4)
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i8 %a, 0
@@ -117,13 +107,11 @@
define void @test_inesc_sext_z_store(i8 signext %a) {
; CHECK-LABEL: test_inesc_sext_z_store:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cntlzw r3, r3
-; CHECK-NEXT: addis r4, r2, glob@toc@ha
-; CHECK-NEXT: srwi r3, r3, 5
-; CHECK-NEXT: xori r3, r3, 1
-; CHECK-NEXT: neg r3, r3
-; CHECK-NEXT: stb r3, glob@toc@l(r4)
+; CHECK: cntlzw r3, r3
+; CHECK: srwi r3, r3, 5
+; CHECK: xori r3, r3, 1
+; CHECK: neg r3, r3
+; CHECK: stb r3, 0(r4)
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i8 %a, 0