Switch over to use the ArchSpec::GetMachine() instead of ArchSpec::GetCore() to keep the code more portable as we add new core types to ArchSpec.
llvm-svn: 204400
diff --git a/lldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp b/lldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp
index 7eca67a..6909c40 100644
--- a/lldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp
+++ b/lldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp
@@ -305,15 +305,13 @@
const uint8_t *trap_opcode = NULL;
size_t trap_opcode_size = 0;
- switch (arch.GetCore())
+ switch (arch.GetMachine())
{
default:
assert(false && "Unhandled architecture in PlatformFreeBSD::GetSoftwareBreakpointTrapOpcode()");
break;
-
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_64_x86_64:
- case ArchSpec::eCore_x86_64_x86_64h:
+ case llvm::Triple::x86:
+ case llvm::Triple::x86_64:
{
static const uint8_t g_i386_opcode[] = { 0xCC };
trap_opcode = g_i386_opcode;
diff --git a/lldb/source/Plugins/Platform/Linux/PlatformLinux.cpp b/lldb/source/Plugins/Platform/Linux/PlatformLinux.cpp
index 4b60262..cef8112 100644
--- a/lldb/source/Plugins/Platform/Linux/PlatformLinux.cpp
+++ b/lldb/source/Plugins/Platform/Linux/PlatformLinux.cpp
@@ -382,22 +382,21 @@
const uint8_t *trap_opcode = NULL;
size_t trap_opcode_size = 0;
- switch (arch.GetCore())
+ switch (arch.GetMachine())
{
default:
assert(false && "CPU type not supported!");
break;
-
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_64_x86_64:
- case ArchSpec::eCore_x86_64_x86_64h:
+
+ case llvm::Triple::x86:
+ case llvm::Triple::x86_64:
{
static const uint8_t g_i386_breakpoint_opcode[] = { 0xCC };
trap_opcode = g_i386_breakpoint_opcode;
trap_opcode_size = sizeof(g_i386_breakpoint_opcode);
}
break;
- case ArchSpec::eCore_hexagon_generic:
+ case llvm::Triple::hexagon:
return 0;
}
diff --git a/lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp b/lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
index 9746743..4325abf 100644
--- a/lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
+++ b/lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
@@ -279,11 +279,10 @@
const uint8_t *trap_opcode = NULL;
size_t trap_opcode_size = 0;
- switch (arch.GetCore())
+ switch (arch.GetMachine())
{
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_64_x86_64:
- case ArchSpec::eCore_x86_64_x86_64h:
+ case llvm::Triple::x86:
+ case llvm::Triple::x86_64:
{
static const uint8_t g_i386_opcode[] = { 0xCC };
trap_opcode = g_i386_opcode;
@@ -291,7 +290,7 @@
}
break;
- case ArchSpec::eCore_hexagon_generic:
+ case llvm::Triple::hexagon:
return 0;
default:
llvm_unreachable("Unhandled architecture in PlatformWindows::GetSoftwareBreakpointTrapOpcode()");
diff --git a/lldb/source/Plugins/Process/POSIX/POSIXThread.cpp b/lldb/source/Plugins/Process/POSIX/POSIXThread.cpp
index 37bb7a7..5f13803 100644
--- a/lldb/source/Plugins/Process/POSIX/POSIXThread.cpp
+++ b/lldb/source/Plugins/Process/POSIX/POSIXThread.cpp
@@ -159,17 +159,15 @@
switch (target_arch.GetTriple().getOS())
{
case llvm::Triple::FreeBSD:
- switch (target_arch.GetCore())
+ switch (target_arch.GetMachine())
{
- case ArchSpec::eCore_mips64:
+ case llvm::Triple::mips64:
reg_interface = new RegisterContextFreeBSD_mips64(target_arch);
break;
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_32_i486:
- case ArchSpec::eCore_x86_32_i486sx:
+ case llvm::Triple::x86:
reg_interface = new RegisterContextFreeBSD_i386(target_arch);
break;
- case ArchSpec::eCore_x86_64_x86_64:
+ case llvm::Triple::X86_64:
reg_interface = new RegisterContextFreeBSD_x86_64(target_arch);
break;
default:
@@ -178,12 +176,10 @@
break;
case llvm::Triple::Linux:
- switch (target_arch.GetCore())
+ switch (target_arch.GetMachine())
{
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_32_i486:
- case ArchSpec::eCore_x86_32_i486sx:
- case ArchSpec::eCore_x86_64_x86_64:
+ case llvm::Triple::x86:
+ case llvm::Triple::X86_64:
if (Host::GetArchitecture().GetAddressByteSize() == 4)
{
// 32-bit hosts run with a RegisterContextLinux_i386 context.
@@ -206,19 +202,17 @@
assert(reg_interface && "OS or CPU not supported!");
- switch (target_arch.GetCore())
+ switch (target_arch.GetMachine())
{
- case ArchSpec::eCore_mips64:
+ case llvm::Triple::mips64:
{
RegisterContextPOSIXProcessMonitor_mips64 *reg_ctx = new RegisterContextPOSIXProcessMonitor_mips64(*this, 0, reg_interface);
m_posix_thread = reg_ctx;
m_reg_context_sp.reset(reg_ctx);
break;
}
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_32_i486:
- case ArchSpec::eCore_x86_32_i486sx:
- case ArchSpec::eCore_x86_64_x86_64:
+ case llvm::Triple::x86:
+ case llvm::Triple::X86_64:
{
RegisterContextPOSIXProcessMonitor_x86_64 *reg_ctx = new RegisterContextPOSIXProcessMonitor_x86_64(*this, 0, reg_interface);
m_posix_thread = reg_ctx;
@@ -609,17 +603,15 @@
unsigned reg = LLDB_INVALID_REGNUM;
ArchSpec arch = Host::GetArchitecture();
- switch (arch.GetCore())
+ switch (arch.GetMachine())
{
default:
llvm_unreachable("CPU type not supported!");
break;
- case ArchSpec::eCore_mips64:
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_32_i486:
- case ArchSpec::eCore_x86_32_i486sx:
- case ArchSpec::eCore_x86_64_x86_64:
+ case llvm::Triple::mips64:
+ case llvm::Triple::x86:
+ case llvm::Triple::x86_64:
{
POSIXBreakpointProtocol* reg_ctx = GetPOSIXBreakpointProtocol();
reg = reg_ctx->GetRegisterIndexFromOffset(offset);
@@ -641,17 +633,15 @@
const char * name = nullptr;
ArchSpec arch = Host::GetArchitecture();
- switch (arch.GetCore())
+ switch (arch.GetMachine())
{
default:
assert(false && "CPU type not supported!");
break;
- case ArchSpec::eCore_mips64:
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_32_i486:
- case ArchSpec::eCore_x86_32_i486sx:
- case ArchSpec::eCore_x86_64_x86_64:
+ case llvm::Triple::mips64:
+ case llvm::Triple::x86:
+ case llvm::Triple::x86_64:
name = GetRegisterContext()->GetRegisterName(reg);
break;
}
diff --git a/lldb/source/Plugins/Process/POSIX/ProcessPOSIX.cpp b/lldb/source/Plugins/Process/POSIX/ProcessPOSIX.cpp
index f4b1dd7..4ee7e3d 100644
--- a/lldb/source/Plugins/Process/POSIX/ProcessPOSIX.cpp
+++ b/lldb/source/Plugins/Process/POSIX/ProcessPOSIX.cpp
@@ -643,14 +643,14 @@
const uint8_t *opcode = NULL;
size_t opcode_size = 0;
- switch (arch.GetCore())
+ switch (arch.GetMachine())
{
default:
assert(false && "CPU type not supported!");
break;
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_64_x86_64:
+ case llvm::Triple::x86:
+ case llvm::Triple::x86_64:
opcode = g_i386_opcode;
opcode_size = sizeof(g_i386_opcode);
break;
diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp
index 01c9bb4..af9445f 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp
+++ b/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp
@@ -75,11 +75,9 @@
const RegisterInfo *
RegisterContextFreeBSD_i386::GetRegisterInfo()
{
- switch (m_target_arch.GetCore())
+ switch (m_target_arch.GetMachine())
{
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_32_i486:
- case ArchSpec::eCore_x86_32_i486sx:
+ case llvm::Triple::x86:
return g_register_infos_i386;
default:
assert(false && "Unhandled target architecture.");
diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp
index 2162aaf..e396a8b4 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp
+++ b/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp
@@ -110,13 +110,11 @@
const RegisterInfo *
RegisterContextFreeBSD_x86_64::GetRegisterInfo()
{
- switch (m_target_arch.GetCore())
+ switch (m_target_arch.GetMachine())
{
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_32_i486:
- case ArchSpec::eCore_x86_32_i486sx:
+ case llvm::Triple::x86:
return GetRegisterInfo_i386 (m_target_arch);
- case ArchSpec::eCore_x86_64_x86_64:
+ case llvm::Triple::x86_64:
return g_register_infos_x86_64;
default:
assert(false && "Unhandled target architecture.");
diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp
index 1d11e81..56c1776 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp
+++ b/lldb/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp
@@ -113,11 +113,9 @@
const RegisterInfo *
RegisterContextLinux_i386::GetRegisterInfo()
{
- switch (m_target_arch.GetCore())
+ switch (m_target_arch.GetMachine())
{
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_32_i486:
- case ArchSpec::eCore_x86_32_i486sx:
+ case llvm::Triple::x86:
return g_register_infos_i386;
default:
assert(false && "Unhandled target architecture.");
diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp
index fd01ab5..6070100 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp
+++ b/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp
@@ -123,13 +123,11 @@
const RegisterInfo *
RegisterContextLinux_x86_64::GetRegisterInfo()
{
- switch (m_target_arch.GetCore())
+ switch (m_target_arch.GetMachine())
{
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_32_i486:
- case ArchSpec::eCore_x86_32_i486sx:
+ case llvm::Triple::x86:
return GetRegisterInfo_i386 (m_target_arch);
- case ArchSpec::eCore_x86_64_x86_64:
+ case llvm::Triple::x86_64:
return g_register_infos_x86_64;
default:
assert(false && "Unhandled target architecture.");
diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp
index ad8ecac..7f4a49e 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp
+++ b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp
@@ -383,11 +383,9 @@
{
m_register_info_ap.reset(register_info);
- switch (register_info->m_target_arch.GetCore())
+ switch (register_info->m_target_arch.GetMachine())
{
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_32_i486:
- case ArchSpec::eCore_x86_32_i486sx:
+ case llvm::Triple::x86:
m_reg_info.num_registers = k_num_registers_i386;
m_reg_info.num_gpr_registers = k_num_gpr_registers_i386;
m_reg_info.num_fpr_registers = k_num_fpr_registers_i386;
@@ -406,7 +404,7 @@
m_reg_info.first_dr = dr0_i386;
m_reg_info.gpr_flags = gpr_eflags_i386;
break;
- case ArchSpec::eCore_x86_64_x86_64:
+ case llvm::Triple::x86_64:
m_reg_info.num_registers = k_num_registers_x86_64;
m_reg_info.num_gpr_registers = k_num_gpr_registers_x86_64;
m_reg_info.num_fpr_registers = k_num_fpr_registers_x86_64;
@@ -536,13 +534,11 @@
{
if (IsRegisterSetAvailable(set))
{
- switch (m_register_info_ap->m_target_arch.GetCore())
+ switch (m_register_info_ap->m_target_arch.GetMachine())
{
- case ArchSpec::eCore_x86_32_i386:
- case ArchSpec::eCore_x86_32_i486:
- case ArchSpec::eCore_x86_32_i486sx:
+ case llvm::Triple::x86:
return &g_reg_sets_i386[set];
- case ArchSpec::eCore_x86_64_x86_64:
+ case llvm::Triple::x86_64:
return &g_reg_sets_x86_64[set];
default:
assert(false && "Unhandled target architecture.");