commit 90e4f719e1d372ec9a667b3346247c48d13bfde9
author Matt Arsenault <Matthew.Arsenault@amd.com> Mon Nov 13 01:47:52 2017 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Mon Nov 13 01:47:52 2017 +0000
tree bf7c356d5b4f71ea87c42be17e448b7de0eb6ea7
parent e1cd482fda78c18d4242f7e834686d2f38c86854

Fix some misc. -enable-var-scope violations

llvm-svn: 318006

llvm/test/Transforms/MemCpyOpt/memcpy.ll

diff --git a/llvm/test/Transforms/MemCpyOpt/memcpy.ll b/llvm/test/Transforms/MemCpyOpt/memcpy.ll
index e4d50f7..9f0ad2d 100644
--- a/llvm/test/Transforms/MemCpyOpt/memcpy.ll
+++ b/llvm/test/Transforms/MemCpyOpt/memcpy.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -basicaa -memcpyopt -dse -S | FileCheck %s
+; RUN: opt < %s -basicaa -memcpyopt -dse -S | FileCheck -enable-var-scope %s
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i686-apple-darwin9"
@@ -29,7 +29,7 @@
 ; CHECK: ret void
 }
 
-declare void @ccoshl(%0* nocapture sret, x86_fp80, x86_fp80) nounwind 
+declare void @ccoshl(%0* nocapture sret, x86_fp80, x86_fp80) nounwind
 
 
 ; The intermediate alloca and one of the memcpy's should be eliminated, the
@@ -40,7 +40,7 @@
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* %R, i8* %P, i32 32, i32 16, i1 false)
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* %Q, i8* %R, i32 32, i32 16, i1 false)
   ret void
-        
+
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT: call void @llvm.memmove{{.*}}(i8* %Q, i8* %P
 ; CHECK-NEXT: ret void
@@ -59,7 +59,7 @@
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* %agg.result2, i8* %x.01, i32 32, i32 16, i1 false)
   ret void
 ; CHECK-LABEL: @test3(
-; CHECK-NEXT: %agg.result1 = bitcast 
+; CHECK-NEXT: %agg.result1 = bitcast
 ; CHECK-NEXT: call void @llvm.memcpy
 ; CHECK-NEXT: ret void
 }
@@ -137,7 +137,7 @@
   %call = call i32 @g(%struct.p* align 8 byval %agg.tmp) nounwind
   ret i32 %call
 ; CHECK-LABEL: @test7(
-; CHECK: call i32 @g(%struct.p* byval align 8 %q) [[NUW:#[0-9]+]]
+; CHECK: call i32 @g(%struct.p* byval align 8 %q) [[$NUW:#[0-9]+]]
 }
 
 declare i32 @g(%struct.p* align 8 byval)
@@ -233,7 +233,7 @@
 declare void @f1(%struct.big* nocapture sret)
 declare void @f2(%struct.big*)
 
-; CHECK: attributes [[NUW]] = { nounwind }
+; CHECK: attributes [[$NUW]] = { nounwind }
 ; CHECK: attributes #1 = { argmemonly nounwind }
 ; CHECK: attributes #2 = { nounwind ssp }
 ; CHECK: attributes #3 = { nounwind ssp uwtable }