commit 91a51c5a7c2299cdcf0a292a94f3a89e516425bc
author Tim Northover <Tim.Northover@arm.com> Wed Feb 06 09:04:56 2013 +0000
committer Tim Northover <Tim.Northover@arm.com> Wed Feb 06 09:04:56 2013 +0000
tree 75771173b10159f4f72bcf4c17127bf30db644ee
parent 63b8819445c809afcf381bb499d26291c85c45c9

Add icache prefetch operations to AArch64

This adds hints to the various "prfm" instructions so that they can
affect the instruction cache as well as the data cache.

llvm-svn: 174495

llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp

diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
index 5f09074..ab9bba1 100644
--- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
+++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
@@ -120,6 +120,12 @@
   {"pldl2strm", PLDL2STRM},
   {"pldl3keep", PLDL3KEEP},
   {"pldl3strm", PLDL3STRM},
+  {"plil1keep", PLIL1KEEP},
+  {"plil1strm", PLIL1STRM},
+  {"plil2keep", PLIL2KEEP},
+  {"plil2strm", PLIL2STRM},
+  {"plil3keep", PLIL3KEEP},
+  {"plil3strm", PLIL3STRM},
   {"pstl1keep", PSTL1KEEP},
   {"pstl1strm", PSTL1STRM},
   {"pstl2keep", PSTL2KEEP},