Ensure bitcode encoding of instructions and their operands stays stable.
This includes instructions with aggregate operands (insert/extract), instructions with vector operands (insert/extract/shuffle), binary arithmetic and bitwise instructions, conversion instructions and terminators.
Work was done by lama.saba@intel.com.
llvm-svn: 202262
diff --git a/llvm/test/Bitcode/terminatorInstructions.3.2.ll b/llvm/test/Bitcode/terminatorInstructions.3.2.ll
new file mode 100644
index 0000000..31e7896
--- /dev/null
+++ b/llvm/test/Bitcode/terminatorInstructions.3.2.ll
@@ -0,0 +1,47 @@
+; RUN: llvm-dis < %s.bc| FileCheck %s
+
+; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread terminator instructions from
+; older bitcode files.
+
+define i32 @condbr(i1 %cond){
+entry:
+; CHECK: br i1 %cond, label %TrueLabel, label %FalseLabel
+ br i1 %cond, label %TrueLabel, label %FalseLabel
+
+ TrueLabel:
+ ret i32 1
+
+ FalseLabel:
+ ret i32 0
+}
+
+define i32 @uncondbr(){
+entry:
+; CHECK: br label %uncondLabel
+ br label %uncondLabel
+
+ uncondLabel:
+ ret i32 1
+}
+
+define i32 @indirectbr(i8* %Addr){
+entry:
+; CHECK: indirectbr i8* %Addr, [label %bb1, label %bb2]
+ indirectbr i8* %Addr, [ label %bb1, label %bb2 ]
+
+ bb1:
+ ret i32 1
+
+ bb2:
+ ret i32 0
+}
+
+define void @unreachable(){
+entry:
+; CHECK: unreachable
+ unreachable
+
+ ret void
+}
+