[X86] Add a pass to convert instruction chains between domains.
The pass scans the function to find instruction chains that define
registers in the same domain (closures).
It then calculates the cost of converting the closure to another domain.
If found profitable, the instructions are converted to instructions in
the other domain and the register classes are changed accordingly.
This commit adds the pass infrastructure and a simple conversion from
the GPR domain to the Mask domain.
Differential Revision:
https://reviews.llvm.org/D37251
Change-Id: Ic2cf1d76598110401168326d411128ae2580a604
llvm-svn: 316288
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 51ae377..1c5f2a2 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -60,6 +60,7 @@
void initializeFixupLEAPassPass(PassRegistry &);
void initializeX86CmovConverterPassPass(PassRegistry &);
void initializeX86ExecutionDepsFixPass(PassRegistry &);
+void initializeX86DomainReassignmentPass(PassRegistry &);
} // end namespace llvm
@@ -76,6 +77,7 @@
initializeFixupLEAPassPass(PR);
initializeX86CmovConverterPassPass(PR);
initializeX86ExecutionDepsFixPass(PR);
+ initializeX86DomainReassignmentPass(PR);
}
static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
@@ -314,6 +316,7 @@
bool addGlobalInstructionSelect() override;
bool addILPOpts() override;
bool addPreISel() override;
+ void addMachineSSAOptimization() override;
void addPreRegAlloc() override;
void addPostRegAlloc() override;
void addPreEmitPass() override;
@@ -407,6 +410,10 @@
addPass(createX86WinAllocaExpander());
}
+void X86PassConfig::addMachineSSAOptimization() {
+ addPass(createX86DomainReassignmentPass());
+ TargetPassConfig::addMachineSSAOptimization();
+}
void X86PassConfig::addPostRegAlloc() {
addPass(createX86FloatingPointStackifierPass());