commit 940e6075e4c1a8b8a1618fdc332b41d5f58a6b5b
author Matt Arsenault <Matthew.Arsenault@amd.com> Fri Aug 10 19:20:17 2018 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Fri Aug 10 19:20:17 2018 +0000
tree 88c6f041e35ddf4e9fc6f3abd6b2c1e6dced5a94
parent 8988b8d92c1958f3781970ae76d5fff5f7691e30

AMDGPU: More canonicalized operations

llvm-svn: 339464

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index 58370dc..5f13af9 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -4395,10 +4395,20 @@
     case Intrinsic::amdgcn_cubeid:
       return true;
 
-    case Intrinsic::amdgcn_frexp_mant:
+    case Intrinsic::amdgcn_frexp_mant: {
       if (SNaN)
         return true;
       return DAG.isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1);
+    }
+    case Intrinsic::amdgcn_cvt_pkrtz: {
+      if (SNaN)
+        return true;
+      return DAG.isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1) &&
+             DAG.isKnownNeverNaN(Op.getOperand(2), SNaN, Depth + 1);
+    }
+    case Intrinsic::amdgcn_fdot2:
+      // TODO: Refine on operand
+      return SNaN;
     default:
       return false;
     }