commit 946b3b2e16357ea14b1efbf77f7b003f58766572
author Michael Kuperstein <michael.m.kuperstein@intel.com> Tue Sep 23 08:48:01 2014 +0000
committer Michael Kuperstein <michael.m.kuperstein@intel.com> Tue Sep 23 08:48:01 2014 +0000
tree 42be8ca8b13372192181612b462b9b969b6bc842
parent 27720765ed1a12d7b998afb390d37c69b2c25aec

Ensure bitcode encoding stays stable.
This includes constants, attributes, and some additional instructions not covered by previous tests.

Work was done by lama.saba@intel.com.

llvm-svn: 218297

llvm/test/Bitcode/conversionInstructions.3.2.ll

diff --git a/llvm/test/Bitcode/conversionInstructions.3.2.ll b/llvm/test/Bitcode/conversionInstructions.3.2.ll
index 14dbbec..ae2d65e 100644
--- a/llvm/test/Bitcode/conversionInstructions.3.2.ll
+++ b/llvm/test/Bitcode/conversionInstructions.3.2.ll
@@ -1,7 +1,6 @@
-; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: verify-uselistorder < %s.bc
+; RUN:  llvm-dis < %s.bc| FileCheck %s
 
-; conversionOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; conversionInstructions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread conversion instructions from
 ; older bitcode files.
 
@@ -9,7 +8,7 @@
 entry:
 ; CHECK: %res1 = trunc i32 %src to i8
   %res1 = trunc i32 %src to i8
-
+    
   ret void
 }
 
@@ -17,7 +16,7 @@
 entry:
 ; CHECK: %res1 = zext i32 %src to i64
   %res1 = zext i32 %src to i64
-
+    
   ret void
 }
 
@@ -25,7 +24,7 @@
 entry:
 ; CHECK: %res1 = sext i32 %src to i64
   %res1 = sext i32 %src to i64
-
+    
   ret void
 }
 
@@ -33,7 +32,7 @@
 entry:
 ; CHECK: %res1 = fptrunc double %src to float
   %res1 = fptrunc double %src to float
-
+  
   ret void
 }
 
@@ -41,7 +40,7 @@
 entry:
 ; CHECK: %res1 = fpext float %src to double
   %res1 = fpext float %src to double
-
+  
   ret void
 }
 
@@ -49,7 +48,7 @@
 entry:
 ; CHECK: %res1 = fptoui float %src to i32
   %res1 = fptoui float %src to i32
-
+  
   ret void
 }
 
@@ -57,7 +56,7 @@
 entry:
 ; CHECK: %res1 = fptosi float %src to i32
   %res1 = fptosi float %src to i32
-
+  
   ret void
 }
 
@@ -65,7 +64,7 @@
 entry:
 ; CHECK: %res1 = uitofp i32 %src to float
   %res1 = uitofp i32 %src to float
-
+  
   ret void
 }
 
@@ -73,7 +72,7 @@
 entry:
 ; CHECK: %res1 = sitofp i32 %src to float
   %res1 = sitofp i32 %src to float
-
+  
   ret void
 }
 
@@ -81,7 +80,7 @@
 entry:
 ; CHECK: %res1 = ptrtoint i32* %src to i8
   %res1 = ptrtoint i32* %src to i8
-
+  
   ret void
 }
 
@@ -89,7 +88,7 @@
 entry:
 ; CHECK: %res1 = inttoptr i32 %src to i32*
   %res1 = inttoptr i32 %src to i32*
-
+  
   ret void
 }
 
@@ -97,9 +96,29 @@
 entry:
 ; CHECK: %res1 = bitcast i32 %src1 to i32
   %res1 = bitcast i32 %src1 to i32
-
+  
 ; CHECK: %res2 = bitcast i32* %src2 to i64*
   %res2 = bitcast i32* %src2 to i64*
+  
+  ret void
+}
 
+define void @ptrtointInstr(i32* %ptr, <4 x i32*> %vecPtr){
+entry:
+; CHECK: %res1 = ptrtoint i32* %ptr to i8
+  %res1 = ptrtoint i32* %ptr to i8  
+; CHECK-NEXT: %res2 = ptrtoint <4 x i32*> %vecPtr to <4 x i64>
+  %res2 = ptrtoint <4 x i32*> %vecPtr to <4 x i64>
+  
+  ret void
+}
+
+define void @inttoptrInstr(i32 %x, <4 x i32> %vec){
+entry:
+; CHECK: %res1 = inttoptr i32 %x to i64*
+  %res1 = inttoptr i32 %x to i64*
+; CHECK-NEXT: inttoptr <4 x i32> %vec to <4 x i8*>
+  %res2 = inttoptr <4 x i32> %vec to <4 x i8*>
+  
   ret void
 }