commit 94a940d2b4094dc4b98a59367a72be8bbd270de7
author Craig Topper <craig.topper@intel.com> Wed Feb 21 00:16:50 2018 +0000
committer Craig Topper <craig.topper@intel.com> Wed Feb 21 00:16:50 2018 +0000
tree 1321c5af49d6eb9f172bb5874d3b680699b7e016
parent d710adac2de3605292396fff7ada22aaaa647c06

[X86] Disable CLWB in Cannon Lake

Cannon Lake does not support CLWB, therefore it
does not include all features listed under SKX.

Patch by Gabor Buella

Differential Revision: https://reviews.llvm.org/D43459

llvm-svn: 325655

clang/test/Preprocessor/predefined-arch-macros.c

diff --git a/clang/test/Preprocessor/predefined-arch-macros.c b/clang/test/Preprocessor/predefined-arch-macros.c
index ba3cb44..ba9a5e9 100644
--- a/clang/test/Preprocessor/predefined-arch-macros.c
+++ b/clang/test/Preprocessor/predefined-arch-macros.c
@@ -974,7 +974,7 @@
 // CHECK_CNL_M32: #define __BMI2__ 1
 // CHECK_CNL_M32: #define __BMI__ 1
 // CHECK_CNL_M32: #define __CLFLUSHOPT__ 1
-// CHECK_CNL_M32: #define __CLWB__ 1
+// CHECK_CNL_M32-NOT: #define __CLWB__ 1
 // CHECK_CNL_M32: #define __F16C__ 1
 // CHECK_CNL_M32: #define __FMA__ 1
 // CHECK_CNL_M32: #define __LZCNT__ 1
@@ -1022,7 +1022,7 @@
 // CHECK_CNL_M64: #define __BMI2__ 1
 // CHECK_CNL_M64: #define __BMI__ 1
 // CHECK_CNL_M64: #define __CLFLUSHOPT__ 1
-// CHECK_CNL_M64: #define __CLWB__ 1
+// CHECK_CNL_M64-NOT: #define __CLWB__ 1
 // CHECK_CNL_M64: #define __F16C__ 1
 // CHECK_CNL_M64: #define __FMA__ 1
 // CHECK_CNL_M64: #define __LZCNT__ 1