commit 956dd2261e1b48648b3224f1a33de3fceb78e710
author Akira Hatanaka <ahatanaka@mips.com> Thu Mar 08 01:59:33 2012 +0000
committer Akira Hatanaka <ahatanaka@mips.com> Thu Mar 08 01:59:33 2012 +0000
tree 01f4581a0ba1f0825fbdcefe02ba25f2f5a1f23c
parent 1c66a0e1c0ca7fd8635a5de13a3d91da6042420b

Set minimum function alignment to 3 if target is Mips64.

llvm-svn: 152282

llvm/lib/Target/Mips/MipsISelLowering.cpp

diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index dc894d9..5703ea9 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -250,7 +250,7 @@
   setTargetDAGCombine(ISD::AND);
   setTargetDAGCombine(ISD::OR);
 
-  setMinFunctionAlignment(2);
+  setMinFunctionAlignment(HasMips64 ? 3 : 2);
 
   setStackPointerRegisterToSaveRestore(IsN64 ? Mips::SP_64 : Mips::SP);
   computeRegisterProperties();