commit 95d0117bb3d5fb6061dbb36c507ef43141c60e44
author Sirish Pande <spande@codeaurora.org> Fri May 11 20:00:34 2012 +0000
committer Sirish Pande <spande@codeaurora.org> Fri May 11 20:00:34 2012 +0000
tree a731098ae2c3492303c2867f6ad93494067df87a
parent 1367e49f6b990b2c7970b0391c6e7440195de868

Remove warnings from HexagonVLIWPacketizer.

llvm-svn: 156636

llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp

diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
index fa1a969..e7bdc9c 100644
--- a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
@@ -3295,9 +3295,9 @@
 
     // Check to make sure that they both will have their predicates
     // evaluate identically
-    unsigned predRegNumSrc;
-    unsigned predRegNumDst;
-    const TargetRegisterClass* predRegClass;
+    unsigned predRegNumSrc = 0;
+    unsigned predRegNumDst = 0;
+    const TargetRegisterClass* predRegClass = NULL;
 
     // Get predicate register used in the source instruction
     for(unsigned opNum = 0; opNum < PacketMI->getNumOperands(); opNum++) {