commit 9681c407b4f4a02308803a3c0119e27d44c82fd6
author Simon Pilgrim <llvm-dev@redking.me.uk> Sat Jan 07 22:27:43 2017 +0000
committer Simon Pilgrim <llvm-dev@redking.me.uk> Sat Jan 07 22:27:43 2017 +0000
tree 0ff5f05ab9ac94ce90163821c11835e9b0112922
parent a74e3088dfdc3bd0242dcfb3712a3eeea67ad150

[CostModel][X86] Update SSE41/AVX1 vXi32 SHL costs

SSE41 provides pmulld which allows the simpler pslld/paddd/cvttps2dq/pmulld pattern than SSE2's use of pmuludq.

llvm-svn: 291372

llvm/lib/Target/X86/X86TargetTransformInfo.cpp

diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 30b2055..489aab3 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -489,6 +489,8 @@
     { ISD::SHL,  MVT::v32i8,  2*11 }, // pblendvb sequence.
     { ISD::SHL,  MVT::v8i16,    14 }, // pblendvb sequence.
     { ISD::SHL,  MVT::v16i16, 2*14 }, // pblendvb sequence.
+    { ISD::SHL,  MVT::v4i32,     4 }, // pslld/paddd/cvttps2dq/pmulld
+    { ISD::SHL,  MVT::v8i32,   2*4 }, // pslld/paddd/cvttps2dq/pmulld
 
     { ISD::SRL,  MVT::v16i8,    12 }, // pblendvb sequence.
     { ISD::SRL,  MVT::v32i8,  2*12 }, // pblendvb sequence.