commit 96fa5978282471f1e3a8233272a1b256e93f6129
author Craig Topper <craig.topper@gmail.com> Sun Oct 16 16:50:08 2011 +0000
committer Craig Topper <craig.topper@gmail.com> Sun Oct 16 16:50:08 2011 +0000
tree 766faec5aea440204d4fcaafc2783f8949a87272
parent cc863b2bb6bb018416a65b2f9666ca9dd07dcae5

Add X86 PEXTR and PDEP instructions.

llvm-svn: 142141

llvm/lib/Target/X86/X86CodeEmitter.cpp

diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp
index aeff03a..a150604 100644
--- a/llvm/lib/Target/X86/X86CodeEmitter.cpp
+++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp
@@ -649,15 +649,13 @@
   case X86II::A7:  // 0F A7
     Need0FPrefix = true;
     break;
-  case X86II::TF: // F2 0F 38
-    MCE.emitByte(0xF2);
-    Need0FPrefix = true;
-    break;
   case X86II::REP: break; // already handled.
+  case X86II::T8XS: // F3 0F 38
   case X86II::XS:   // F3 0F
     MCE.emitByte(0xF3);
     Need0FPrefix = true;
     break;
+  case X86II::T8XD: // F2 0F 38
   case X86II::XD:   // F2 0F
     MCE.emitByte(0xF2);
     Need0FPrefix = true;
@@ -683,7 +681,8 @@
     MCE.emitByte(0x0F);
 
   switch (Desc->TSFlags & X86II::Op0Mask) {
-  case X86II::TF:    // F2 0F 38
+  case X86II::T8XD:  // F2 0F 38
+  case X86II::T8XS:  // F3 0F 38
   case X86II::T8:    // 0F 38
     MCE.emitByte(0x38);
     break;