commit 9b8fdab26c7bb92b5b85fc17fb5249edc9f2bd94
author Simon Pilgrim <llvm-dev@redking.me.uk> Fri Dec 07 18:47:05 2018 +0000
committer Simon Pilgrim <llvm-dev@redking.me.uk> Fri Dec 07 18:47:05 2018 +0000
tree f6a8406a40e947645a152636f4fb9944fbb81565
parent ce2e053134ba5d2e890a37886228fd9f6528d2c6

[X86] Replace instregex with instrs list. NFCI. 

llvm-svn: 348626

llvm/lib/Target/X86/X86SchedHaswell.td

diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td
index 429558e..06a32fb 100644
--- a/llvm/lib/Target/X86/X86SchedHaswell.td
+++ b/llvm/lib/Target/X86/X86SchedHaswell.td
@@ -720,7 +720,7 @@
   let NumMicroOps = 17;
   let ResourceCycles = [1, 16];
 }
-def : InstRW<[HWWriteRDRAND], (instregex "RDRAND(16|32|64)r")>;
+def : InstRW<[HWWriteRDRAND], (instrs RDRAND16r, RDRAND32r, RDRAND64r)>;
 
 //=== Floating Point x87 Instructions ===//
 //-- Move instructions --//