commit 9bc81fbe9240ed2288952896f9ac1f4afd6d19dc
author Duncan P. N. Exon Smith <dexonsmith@apple.com> Fri Nov 28 21:29:14 2014 +0000
committer Duncan P. N. Exon Smith <dexonsmith@apple.com> Fri Nov 28 21:29:14 2014 +0000
tree 75c32979250cc76d303739d7083264dffc250a66
parent 6c13c36ddfaf2ce990fc5505d276bddf7d3d650d

Revert "Masked Vector Load and Store Intrinsics."

This reverts commit r222632 (and follow-up r222636), which caused a host
of LNT failures on an internal bot.  I'll respond to the commit on the
list with a reproduction of one of the failures.

Conflicts:
	lib/Target/X86/X86TargetTransformInfo.cpp

llvm-svn: 222936

llvm/utils/TableGen/CodeGenTarget.cpp

diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp
index b871e06..87777d4 100644
--- a/llvm/utils/TableGen/CodeGenTarget.cpp
+++ b/llvm/utils/TableGen/CodeGenTarget.cpp
@@ -537,8 +537,7 @@
       // variants with iAny types; otherwise, if the intrinsic is not
       // overloaded, all the types can be specified directly.
       assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
-               !TyEl->isSubClassOf("LLVMTruncatedType") &&
-               !TyEl->isSubClassOf("LLVMVectorSameWidth")) ||
+               !TyEl->isSubClassOf("LLVMTruncatedType")) ||
               VT == MVT::iAny || VT == MVT::vAny) &&
              "Expected iAny or vAny type");
     } else

llvm/utils/TableGen/IntrinsicEmitter.cpp

diff --git a/llvm/utils/TableGen/IntrinsicEmitter.cpp b/llvm/utils/TableGen/IntrinsicEmitter.cpp
index dcf4b80..37f6de0 100644
--- a/llvm/utils/TableGen/IntrinsicEmitter.cpp
+++ b/llvm/utils/TableGen/IntrinsicEmitter.cpp
@@ -257,8 +257,7 @@
   IIT_ANYPTR = 26,
   IIT_V1   = 27,
   IIT_VARARG = 28,
-  IIT_HALF_VEC_ARG = 29,
-  IIT_SAME_VEC_WIDTH_ARG = 30
+  IIT_HALF_VEC_ARG = 29
 };
 
 
@@ -306,13 +305,6 @@
       Sig.push_back(IIT_TRUNC_ARG);
     else if (R->isSubClassOf("LLVMHalfElementsVectorType"))
       Sig.push_back(IIT_HALF_VEC_ARG);
-    else if (R->isSubClassOf("LLVMVectorSameWidth")) {
-      Sig.push_back(IIT_SAME_VEC_WIDTH_ARG);
-      Sig.push_back((Number << 2) | ArgCodes[Number]);
-      MVT::SimpleValueType VT = getValueType(R->getValueAsDef("ElTy"));
-      EncodeFixedValueType(VT, Sig);
-      return;
-    }
     else
       Sig.push_back(IIT_ARG);
     return Sig.push_back((Number << 2) | ArgCodes[Number]);