commit 9bebf832c8f71dc4761ae4bb3eacc787be7f77fe
author Chris Lattner <sabre@nondot.org> Mon Oct 28 20:10:56 2002 +0000
committer Chris Lattner <sabre@nondot.org> Mon Oct 28 20:10:56 2002 +0000
tree d1b96aaa787957c7342d40167647db74f446ad7f
parent d5b45791a44e06090b2760409a00f0a6b67b2fa3

Don't pass default args

llvm-svn: 4354

llvm/lib/Target/Sparc/SparcRegInfo.cpp

diff --git a/llvm/lib/Target/Sparc/SparcRegInfo.cpp b/llvm/lib/Target/Sparc/SparcRegInfo.cpp
index d5977b8..f6ad9c6 100644
--- a/llvm/lib/Target/Sparc/SparcRegInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcRegInfo.cpp
@@ -1298,30 +1298,29 @@
   switch( RegType ) {
   case IntRegType:
     MI = new MachineInstr(ADD, 3);
-    MI->SetMachineOperandVal(0, MachineOperand:: MO_VirtualRegister, Src, false);
+    MI->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, Src);
     MI->SetMachineOperandReg(1, getZeroRegNum());
-    MI->SetMachineOperandVal(2, MachineOperand:: MO_VirtualRegister, Dest, true);
+    MI->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, Dest, true);
     break;
 
   case FPSingleRegType:
     MI = new MachineInstr(FMOVS, 2);
-    MI->SetMachineOperandVal(0, MachineOperand:: MO_VirtualRegister, Src, false);
-    MI->SetMachineOperandVal(1, MachineOperand:: MO_VirtualRegister, Dest, true);
+    MI->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, Src);
+    MI->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, Dest, true);
     break;
 
 
   case FPDoubleRegType:
     MI = new MachineInstr(FMOVD, 2);
-    MI->SetMachineOperandVal(0, MachineOperand:: MO_VirtualRegister, Src, false);
-    MI->SetMachineOperandVal(1, MachineOperand:: MO_VirtualRegister, Dest, true);
+    MI->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, Src);
+    MI->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, Dest, true);
     break;
 
   default:
     assert(0 && "Unknow RegType in CpValu2Value");
   }
 
-  if (MI)
-    mvec.push_back(MI);
+  mvec.push_back(MI);
 }