AMDGPU: Remove some old intrinsic uses from tests
llvm-svn: 260493
diff --git a/llvm/test/CodeGen/AMDGPU/vop-shrink.ll b/llvm/test/CodeGen/AMDGPU/vop-shrink.ll
index 2bfe1b2..ae8ec58 100644
--- a/llvm/test/CodeGen/AMDGPU/vop-shrink.ll
+++ b/llvm/test/CodeGen/AMDGPU/vop-shrink.ll
@@ -1,5 +1,5 @@
-; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
-; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; Test that we correctly commute a sub instruction
; FUNC-LABEL: {{^}}sub_rev:
@@ -10,7 +10,7 @@
define void @sub_rev(i32 addrspace(1)* %out, <4 x i32> %sgpr, i32 %cond) {
entry:
- %vgpr = call i32 @llvm.r600.read.tidig.x() #1
+ %vgpr = call i32 @llvm.amdgcn.workitem.id.x() #1
%tmp = icmp eq i32 %cond, 0
br i1 %tmp, label %if, label %else
@@ -37,7 +37,7 @@
; SI: v_add_f32_e32 v{{[0-9]+}}, 0x44800000
define void @add_fold(float addrspace(1)* %out) {
entry:
- %tmp = call i32 @llvm.r600.read.tidig.x()
+ %tmp = call i32 @llvm.amdgcn.workitem.id.x()
%tmp1 = uitofp i32 %tmp to float
%tmp2 = fadd float %tmp1, 1.024000e+03
store float %tmp2, float addrspace(1)* %out
@@ -45,7 +45,7 @@
}
; Function Attrs: nounwind readnone
-declare i32 @llvm.r600.read.tidig.x() #0
+declare i32 @llvm.amdgcn.workitem.id.x() #0
attributes #0 = { nounwind readnone }
attributes #1 = { readnone }