[SystemZ] Add CodeGen test cases
This adds all CodeGen tests for the SystemZ target.
This version of the patch incorporates feedback from a review by
Sean Silva. Thanks to all reviewers!
Patch by Richard Sandiford.
llvm-svn: 181204
diff --git a/llvm/test/CodeGen/SystemZ/int-add-09.ll b/llvm/test/CodeGen/SystemZ/int-add-09.ll
new file mode 100644
index 0000000..bfe6338
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/int-add-09.ll
@@ -0,0 +1,56 @@
+; Test 128-bit addition in which the second operand is constant.
+;
+; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+
+; Check additions of 1. The XOR ensures that we don't instead load the
+; constant into a register and use memory addition.
+define void @f1(i128 *%aptr) {
+; CHECK: f1:
+; CHECK: algfi {{%r[0-5]}}, 1
+; CHECK: alcgr
+; CHECK: br %r14
+ %a = load i128 *%aptr
+ %xor = xor i128 %a, 128
+ %add = add i128 %xor, 1
+ store i128 %add, i128 *%aptr
+ ret void
+}
+
+; Check the high end of the ALGFI range.
+define void @f2(i128 *%aptr) {
+; CHECK: f2:
+; CHECK: algfi {{%r[0-5]}}, 4294967295
+; CHECK: alcgr
+; CHECK: br %r14
+ %a = load i128 *%aptr
+ %xor = xor i128 %a, 128
+ %add = add i128 %xor, 4294967295
+ store i128 %add, i128 *%aptr
+ ret void
+}
+
+; Check the next value up, which must use register addition.
+define void @f3(i128 *%aptr) {
+; CHECK: f3:
+; CHECK: algr
+; CHECK: alcgr
+; CHECK: br %r14
+ %a = load i128 *%aptr
+ %xor = xor i128 %a, 128
+ %add = add i128 %xor, 4294967296
+ store i128 %add, i128 *%aptr
+ ret void
+}
+
+; Check addition of -1, which must also use register addition.
+define void @f4(i128 *%aptr) {
+; CHECK: f4:
+; CHECK: algr
+; CHECK: alcgr
+; CHECK: br %r14
+ %a = load i128 *%aptr
+ %xor = xor i128 %a, 128
+ %add = add i128 %xor, -1
+ store i128 %add, i128 *%aptr
+ ret void
+}