[InlineSpiller] Only account for real spills in the hoisting logic
Spills of undef values shouldn't impact the placement of the relevant
spills. Drive by review.
llvm-svn: 304850
diff --git a/llvm/lib/CodeGen/InlineSpiller.cpp b/llvm/lib/CodeGen/InlineSpiller.cpp
index 68f2a2e..4e6a3ec 100644
--- a/llvm/lib/CodeGen/InlineSpiller.cpp
+++ b/llvm/lib/CodeGen/InlineSpiller.cpp
@@ -877,14 +877,16 @@
MachineBasicBlock &MBB = *MI->getParent();
MachineInstrSpan MIS(MI);
- if (isFullUndefDef(*MI))
+ bool IsRealSpill = true;
+ if (isFullUndefDef(*MI)) {
// Don't spill undef value.
// Anything works for undef, in particular keeping the memory
// uninitialized is a viable option and it saves code size and
// run time.
BuildMI(MBB, std::next(MI), MI->getDebugLoc(), TII.get(TargetOpcode::KILL))
.addReg(NewVReg, getKillRegState(isKill));
- else
+ IsRealSpill = false;
+ } else
TII.storeRegToStackSlot(MBB, std::next(MI), NewVReg, isKill, StackSlot,
MRI.getRegClass(NewVReg), &TRI);
@@ -893,7 +895,8 @@
DEBUG(dumpMachineInstrRangeWithSlotIndex(std::next(MI), MIS.end(), LIS,
"spill"));
++NumSpills;
- HSpiller.addToMergeableSpills(*std::next(MI), StackSlot, Original);
+ if (IsRealSpill)
+ HSpiller.addToMergeableSpills(*std::next(MI), StackSlot, Original);
}
/// spillAroundUses - insert spill code around each use of Reg.