MachineVerifier: Fix assert on implicit virtreg use
If the liveness of a physical register was invalid, this
was attempting to iterate the subregisters of all register
uses of the instruction, which would assert when it
encountered an implicit virtual register operand.
llvm-svn: 340763
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 1c19281..8b27470 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -1533,10 +1533,12 @@
// get a report for its operand.
if (Bad) {
for (const MachineOperand &MOP : MI->uses()) {
- if (!MOP.isReg())
+ if (!MOP.isReg() || !MOP.isImplicit())
continue;
- if (!MOP.isImplicit())
+
+ if (!TargetRegisterInfo::isPhysicalRegister(MOP.getReg()))
continue;
+
for (MCSubRegIterator SubRegs(MOP.getReg(), TRI); SubRegs.isValid();
++SubRegs) {
if (*SubRegs == Reg) {