change interface for isStride
isStride now takes a partial schedule as input.
Patch from Tobias Grosser <tobias@grosser.es>.
llvm-svn: 170419
diff --git a/polly/lib/CodeGen/BlockGenerators.cpp b/polly/lib/CodeGen/BlockGenerators.cpp
index e8109bd..1e5341a 100644
--- a/polly/lib/CodeGen/BlockGenerators.cpp
+++ b/polly/lib/CodeGen/BlockGenerators.cpp
@@ -562,12 +562,14 @@
}
VectorBlockGenerator::VectorBlockGenerator(IRBuilder<> &B,
- VectorValueMapT &GlobalMaps, ScopStmt &Stmt, __isl_keep isl_set *Domain,
- Pass *P) : BlockGenerator(B, Stmt, P), GlobalMaps(GlobalMaps),
- Domain(Domain) {
- assert(GlobalMaps.size() > 1 && "Only one vector lane found");
- assert(Domain && "No statement domain provided");
- }
+ VectorValueMapT &GlobalMaps,
+ ScopStmt &Stmt,
+ __isl_keep isl_map *Schedule,
+ Pass *P)
+ : BlockGenerator(B, Stmt, P), GlobalMaps(GlobalMaps), Schedule(Schedule) {
+ assert(GlobalMaps.size() > 1 && "Only one vector lane found");
+ assert(Schedule && "No statement domain provided");
+}
Value *VectorBlockGenerator::getVectorValue(const Value *Old,
ValueMapT &VectorMap,
@@ -675,9 +677,9 @@
MemoryAccess &Access = Statement.getAccessFor(Load);
Value *NewLoad;
- if (Access.isStrideZero(isl_set_copy(Domain)))
+ if (Access.isStrideZero(isl_map_copy(Schedule)))
NewLoad = generateStrideZeroLoad(Load, ScalarMaps[0]);
- else if (Access.isStrideOne(isl_set_copy(Domain)))
+ else if (Access.isStrideOne(isl_map_copy(Schedule)))
NewLoad = generateStrideOneLoad(Load, ScalarMaps[0]);
else
NewLoad = generateUnknownStrideLoad(Load, ScalarMaps);
@@ -726,7 +728,7 @@
Value *Vector = getVectorValue(Store->getValueOperand(), VectorMap,
ScalarMaps);
- if (Access.isStrideOne(isl_set_copy(Domain))) {
+ if (Access.isStrideOne(isl_map_copy(Schedule))) {
Type *VectorPtrType = getVectorPtrTy(Pointer, VectorWidth);
Value *NewPointer = getNewValue(Pointer, ScalarMaps[0], GlobalMaps[0]);
diff --git a/polly/lib/CodeGen/CodeGeneration.cpp b/polly/lib/CodeGen/CodeGeneration.cpp
index 064c828..60302cb 100644
--- a/polly/lib/CodeGen/CodeGeneration.cpp
+++ b/polly/lib/CodeGen/CodeGeneration.cpp
@@ -394,6 +394,19 @@
}
}
+// Takes the cloog specific domain and translates it into a map Statement ->
+// PartialSchedule, where the PartialSchedule contains all the dimensions that
+// have been code generated up to this point.
+static __isl_give isl_map *extractPartialSchedule(ScopStmt *Statement,
+ isl_set *Domain) {
+ isl_map *Schedule = Statement->getScattering();
+ int ScheduledDimensions = isl_set_dim(Domain, isl_dim_set);
+ int UnscheduledDimensions = isl_map_dim(Schedule, isl_dim_out) - ScheduledDimensions;
+
+ return isl_map_project_out(Schedule, isl_dim_out, ScheduledDimensions,
+ UnscheduledDimensions);
+}
+
void ClastStmtCodeGen::codegen(const clast_user_stmt *u,
std::vector<Value*> *IVS , const char *iterator,
isl_set *Domain) {
@@ -422,7 +435,9 @@
}
}
- VectorBlockGenerator::generate(Builder, *Statement, VectorMap, Domain, P);
+ isl_map *Schedule = extractPartialSchedule(Statement, Domain);
+ VectorBlockGenerator::generate(Builder, *Statement, VectorMap, Schedule, P);
+ isl_map_free(Schedule);
}
void ClastStmtCodeGen::codegen(const clast_block *b) {
diff --git a/polly/lib/CodeGen/IslAst.cpp b/polly/lib/CodeGen/IslAst.cpp
index 5d16fda..d3d65dc 100644
--- a/polly/lib/CodeGen/IslAst.cpp
+++ b/polly/lib/CodeGen/IslAst.cpp
@@ -246,7 +246,7 @@
isl_ast_node_free(Node);
return 0;
case isl_ast_node_block: {
- isl_ast_node_list *List = isl_ast_node_block_get_children(Node);
+ isl_ast_node_list *List = isl_ast_node_block_get_children(Node);
int Res = isl_ast_node_list_foreach(List, &containsLoops, NULL);
isl_ast_node_list_free(List);
isl_ast_node_free(Node);