[ValueTracking] improve ComputeNumSignBits for vector constants
This is similar to the computeKnownBits improvement in rL268479.
There's probably more we can do for vector logic instructions, but
this should let us see non-splat constant masking ops that can
become vector selects instead of and/andn/or sequences.
Differential Revision: http://reviews.llvm.org/D21610
llvm-svn: 273459
diff --git a/llvm/test/Transforms/InstSimplify/shr-nop.ll b/llvm/test/Transforms/InstSimplify/shr-nop.ll
index 00fc328..9b0f4e9 100644
--- a/llvm/test/Transforms/InstSimplify/shr-nop.ll
+++ b/llvm/test/Transforms/InstSimplify/shr-nop.ll
@@ -423,8 +423,7 @@
define <2 x i4> @ashr_zero_minus1_vec(<2 x i4> %shiftval) {
; CHECK-LABEL: @ashr_zero_minus1_vec(
-; CHECK-NEXT: [[SHR:%.*]] = ashr <2 x i4> <i4 0, i4 -1>, %shiftval
-; CHECK-NEXT: ret <2 x i4> [[SHR]]
+; CHECK-NEXT: ret <2 x i4> <i4 0, i4 -1>
;
%shr = ashr <2 x i4> <i4 0, i4 -1>, %shiftval
ret <2 x i4> %shr