commit a09d18deb00bebf2376ff45a8e4769376ba7a135
author Matthias Braun <matze@braunis.de> Sat Sep 09 00:52:45 2017 +0000
committer Matthias Braun <matze@braunis.de> Sat Sep 09 00:52:45 2017 +0000
tree a98e343c1b9a03c383a8cea4f0e77fd2983c281f
parent a5225e8cb087943bb65f245e1d5df1824a999582

RegAllocFast: Move vector to class level to avoid reallocation; NFC

llvm-svn: 312845

llvm/lib/CodeGen/RegAllocFast.cpp

diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp
index ae0114f..ef3cc16 100644
--- a/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -112,6 +112,9 @@
     // PhysRegState - One of the RegState enums, or a virtreg.
     std::vector<unsigned> PhysRegState;
 
+    SmallVector<unsigned, 16> VirtDead;
+    SmallVector<MachineInstr*, 32> Coalesced;
+
     // Set of register units.
     typedef SparseSet<unsigned> UsedInInstrSet;
 
@@ -810,8 +813,8 @@
     if (MRI->isAllocatable(LI.PhysReg))
       definePhysReg(*MII, LI.PhysReg, regReserved);
 
-  SmallVector<unsigned, 8> VirtDead;
-  SmallVector<MachineInstr*, 32> Coalesced;
+  VirtDead.clear();
+  Coalesced.clear();
 
   // Otherwise, sequentially allocate each instruction in the MBB.
   while (MII != MBB->end()) {