Rename llvm-uselistorder => verify-uselistorder
llvm-svn: 214318
diff --git a/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll b/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
index e1e2d7d..461a92a 100644
--- a/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
+++ b/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
@@ -1,7 +1,7 @@
; This test ensures that we get a bitcast constant expression in and out,
; not a sitofp constant expression.
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; CHECK: bitcast (
@G = external global i32
diff --git a/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll b/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
index a321ce2..16f7e9a 100644
--- a/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
+++ b/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR4373
@foo = weak global { i32 } zeroinitializer
diff --git a/llvm/test/Bitcode/aggregateInstructions.3.2.ll b/llvm/test/Bitcode/aggregateInstructions.3.2.ll
index 4d35be0..2853823 100644
--- a/llvm/test/Bitcode/aggregateInstructions.3.2.ll
+++ b/llvm/test/Bitcode/aggregateInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; aggregateOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread instructions with aggregate operands
diff --git a/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll b/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll
index fba518f..c1eba94 100644
--- a/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll
+++ b/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; Tests vclz and vcnt
define <4 x i16> @vclz16(<4 x i16>* %A) nounwind {
diff --git a/llvm/test/Bitcode/atomic.ll b/llvm/test/Bitcode/atomic.ll
index 448219a..bccb868 100644
--- a/llvm/test/Bitcode/atomic.ll
+++ b/llvm/test/Bitcode/atomic.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as %s -o - | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) {
cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
diff --git a/llvm/test/Bitcode/attributes-3.3.ll b/llvm/test/Bitcode/attributes-3.3.ll
index 7b44938..359d7ce 100644
--- a/llvm/test/Bitcode/attributes-3.3.ll
+++ b/llvm/test/Bitcode/attributes-3.3.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; attributes-3.3.ll.bc was generated by passing this file to llvm-as-3.3.
; The test checks that LLVM does not silently misread attributes of
diff --git a/llvm/test/Bitcode/attributes.ll b/llvm/test/Bitcode/attributes.ll
index 0fe66f5..8286e39 100644
--- a/llvm/test/Bitcode/attributes.ll
+++ b/llvm/test/Bitcode/attributes.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR12696
define void @f1(i8 zeroext)
diff --git a/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll b/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll
index a0010e0..4df5710 100644
--- a/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll
+++ b/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; BinaryFloatOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread binary float instructions from
diff --git a/llvm/test/Bitcode/binaryIntInstructions.3.2.ll b/llvm/test/Bitcode/binaryIntInstructions.3.2.ll
index bcf3d58..4559b4f 100644
--- a/llvm/test/Bitcode/binaryIntInstructions.3.2.ll
+++ b/llvm/test/Bitcode/binaryIntInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; BinaryIntOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread binary integer instructions from
diff --git a/llvm/test/Bitcode/bitwiseInstructions.3.2.ll b/llvm/test/Bitcode/bitwiseInstructions.3.2.ll
index 780f044..f6d4657 100644
--- a/llvm/test/Bitcode/bitwiseInstructions.3.2.ll
+++ b/llvm/test/Bitcode/bitwiseInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread bitwise instructions from
diff --git a/llvm/test/Bitcode/calling-conventions.3.2.ll b/llvm/test/Bitcode/calling-conventions.3.2.ll
index 6a497dc..e1f1634 100644
--- a/llvm/test/Bitcode/calling-conventions.3.2.ll
+++ b/llvm/test/Bitcode/calling-conventions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; calling-conventions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread calling conventions of
diff --git a/llvm/test/Bitcode/case-ranges-3.3.ll b/llvm/test/Bitcode/case-ranges-3.3.ll
index 1198f2b..eaab6ec 100644
--- a/llvm/test/Bitcode/case-ranges-3.3.ll
+++ b/llvm/test/Bitcode/case-ranges-3.3.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; case-ranges.ll.bc was generated by passing this file to llvm-as from the 3.3
; release of LLVM. This tests that the bitcode for switches from that release
diff --git a/llvm/test/Bitcode/cmpxchg-upgrade.ll b/llvm/test/Bitcode/cmpxchg-upgrade.ll
index 94f0eef..2a69ec5 100644
--- a/llvm/test/Bitcode/cmpxchg-upgrade.ll
+++ b/llvm/test/Bitcode/cmpxchg-upgrade.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
; before the IR change on this file.
diff --git a/llvm/test/Bitcode/conversionInstructions.3.2.ll b/llvm/test/Bitcode/conversionInstructions.3.2.ll
index 9f82048..550d443 100644
--- a/llvm/test/Bitcode/conversionInstructions.3.2.ll
+++ b/llvm/test/Bitcode/conversionInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; conversionOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread conversion instructions from
diff --git a/llvm/test/Bitcode/drop-debug-info.ll b/llvm/test/Bitcode/drop-debug-info.ll
index b3073e0..ee86011 100644
--- a/llvm/test/Bitcode/drop-debug-info.ll
+++ b/llvm/test/Bitcode/drop-debug-info.ll
@@ -1,6 +1,6 @@
; RUN: llvm-as < %s -o %t.bc 2>&1 >/dev/null | FileCheck -check-prefix=WARN %s
; RUN: llvm-dis < %t.bc | FileCheck %s
-; RUN: llvm-uselistorder < %t.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %t.bc -preserve-bc-use-list-order -num-shuffles=5
define i32 @main() {
entry:
diff --git a/llvm/test/Bitcode/extractelement.ll b/llvm/test/Bitcode/extractelement.ll
index 29f5b02..ba806a4 100644
--- a/llvm/test/Bitcode/extractelement.ll
+++ b/llvm/test/Bitcode/extractelement.ll
@@ -1,5 +1,5 @@
; RUN: opt < %s -constprop | llvm-dis -disable-output
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR3465
define double @test() {
diff --git a/llvm/test/Bitcode/flags.ll b/llvm/test/Bitcode/flags.ll
index 3760a44..a996a8a 100644
--- a/llvm/test/Bitcode/flags.ll
+++ b/llvm/test/Bitcode/flags.ll
@@ -1,7 +1,7 @@
; RUN: llvm-as < %s | llvm-dis > %t0
; RUN: opt -S < %s > %t1
; RUN: diff %t0 %t1
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR6140
; Make sure the flags are serialized/deserialized properly for both
diff --git a/llvm/test/Bitcode/function-encoding-rel-operands.ll b/llvm/test/Bitcode/function-encoding-rel-operands.ll
index cc2f6ae..14aa01f 100644
--- a/llvm/test/Bitcode/function-encoding-rel-operands.ll
+++ b/llvm/test/Bitcode/function-encoding-rel-operands.ll
@@ -1,7 +1,7 @@
; Basic sanity test to check that instruction operands are encoded with
; relative IDs.
; RUN: llvm-as < %s | llvm-bcanalyzer -dump | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; CHECK: FUNCTION_BLOCK
; CHECK: INST_BINOP {{.*}}op0=1 op1=1
diff --git a/llvm/test/Bitcode/global-variables.3.2.ll b/llvm/test/Bitcode/global-variables.3.2.ll
index 4a856f1..cbba464a 100644
--- a/llvm/test/Bitcode/global-variables.3.2.ll
+++ b/llvm/test/Bitcode/global-variables.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; global-variables.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread global variables attributes of
diff --git a/llvm/test/Bitcode/inalloca.ll b/llvm/test/Bitcode/inalloca.ll
index 445b4a2..386a476 100644
--- a/llvm/test/Bitcode/inalloca.ll
+++ b/llvm/test/Bitcode/inalloca.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; inalloca should roundtrip.
diff --git a/llvm/test/Bitcode/linkage-types-3.2.ll b/llvm/test/Bitcode/linkage-types-3.2.ll
index 01b195f..06e81b9 100644
--- a/llvm/test/Bitcode/linkage-types-3.2.ll
+++ b/llvm/test/Bitcode/linkage-types-3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; linkage-types-3.2.ll.bc was generated by passing this file to llvm-as-3.2
; The test checks that LLVM does not silently misread linkage types of
diff --git a/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll b/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll
index c1a9fbe..f72fd15 100644
--- a/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll
+++ b/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; local-linkage-default-visibility.3.4.ll.bc was generated by passing this file
; to llvm-as-3.4. The test checks that LLVM upgrades visibility of symbols
diff --git a/llvm/test/Bitcode/memInstructions.3.2.ll b/llvm/test/Bitcode/memInstructions.3.2.ll
index a807322..67d24f4 100644
--- a/llvm/test/Bitcode/memInstructions.3.2.ll
+++ b/llvm/test/Bitcode/memInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; memOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread memory related instructions of
diff --git a/llvm/test/Bitcode/metadata.ll b/llvm/test/Bitcode/metadata.ll
index a3550bc..1ceb606 100644
--- a/llvm/test/Bitcode/metadata.ll
+++ b/llvm/test/Bitcode/metadata.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
!llvm.foo = !{!0}
!0 = metadata !{i32 42}
diff --git a/llvm/test/Bitcode/old-aliases.ll b/llvm/test/Bitcode/old-aliases.ll
index 13b6d3e..b32bc1b 100644
--- a/llvm/test/Bitcode/old-aliases.ll
+++ b/llvm/test/Bitcode/old-aliases.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; old-aliases.bc consist of this file assembled with an old llvm-as (3.5 trunk)
; from when aliases contained a ConstantExpr.
diff --git a/llvm/test/Bitcode/ptest-new.ll b/llvm/test/Bitcode/ptest-new.ll
index c0ded8b..ff28481 100644
--- a/llvm/test/Bitcode/ptest-new.ll
+++ b/llvm/test/Bitcode/ptest-new.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define i32 @foo(<2 x i64> %bar) nounwind {
entry:
diff --git a/llvm/test/Bitcode/ptest-old.ll b/llvm/test/Bitcode/ptest-old.ll
index c6c16053..5f252aa 100644
--- a/llvm/test/Bitcode/ptest-old.ll
+++ b/llvm/test/Bitcode/ptest-old.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define i32 @foo(<4 x float> %bar) nounwind {
entry:
diff --git a/llvm/test/Bitcode/select.ll b/llvm/test/Bitcode/select.ll
index 3da5385..a33926c 100644
--- a/llvm/test/Bitcode/select.ll
+++ b/llvm/test/Bitcode/select.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define <2 x i32> @main() {
ret <2 x i32> select (<2 x i1> <i1 false, i1 undef>, <2 x i32> zeroinitializer, <2 x i32> <i32 0, i32 undef>)
diff --git a/llvm/test/Bitcode/shuffle.ll b/llvm/test/Bitcode/shuffle.ll
index 65bde67..5b0e9e7 100644
--- a/llvm/test/Bitcode/shuffle.ll
+++ b/llvm/test/Bitcode/shuffle.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; <rdar://problem/8622574>
; tests the bitcodereader can handle the case where the reader will initially
diff --git a/llvm/test/Bitcode/tailcall.ll b/llvm/test/Bitcode/tailcall.ll
index ea47df6..5eed7a3 100644
--- a/llvm/test/Bitcode/tailcall.ll
+++ b/llvm/test/Bitcode/tailcall.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; Check that musttail and tail roundtrip.
diff --git a/llvm/test/Bitcode/terminatorInstructions.3.2.ll b/llvm/test/Bitcode/terminatorInstructions.3.2.ll
index d9e51a5..a2285a13 100644
--- a/llvm/test/Bitcode/terminatorInstructions.3.2.ll
+++ b/llvm/test/Bitcode/terminatorInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread terminator instructions from
diff --git a/llvm/test/Bitcode/upgrade-global-ctors.ll b/llvm/test/Bitcode/upgrade-global-ctors.ll
index f75b28b..b01c752 100644
--- a/llvm/test/Bitcode/upgrade-global-ctors.ll
+++ b/llvm/test/Bitcode/upgrade-global-ctors.ll
@@ -1,4 +1,4 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; CHECK: @llvm.global_ctors = appending global [0 x { i32, void ()*, i8* }] zeroinitializer
diff --git a/llvm/test/Bitcode/upgrade-loop-metadata.ll b/llvm/test/Bitcode/upgrade-loop-metadata.ll
index 5c18bd9..3c1db98 100644
--- a/llvm/test/Bitcode/upgrade-loop-metadata.ll
+++ b/llvm/test/Bitcode/upgrade-loop-metadata.ll
@@ -1,7 +1,7 @@
; Test to make sure loop vectorizer metadata is automatically upgraded.
;
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
define void @_Z28loop_with_vectorize_metadatav() {
entry:
diff --git a/llvm/test/Bitcode/upgrade-tbaa.ll b/llvm/test/Bitcode/upgrade-tbaa.ll
index 0d88fa6..8dd3b69 100644
--- a/llvm/test/Bitcode/upgrade-tbaa.ll
+++ b/llvm/test/Bitcode/upgrade-tbaa.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; Function Attrs: nounwind
define void @_Z4testPiPf(i32* nocapture %pI, float* nocapture %pF) #0 {
diff --git a/llvm/test/Bitcode/use-list-order.ll b/llvm/test/Bitcode/use-list-order.ll
index 33cc13e..bb71a85 100644
--- a/llvm/test/Bitcode/use-list-order.ll
+++ b/llvm/test/Bitcode/use-list-order.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
@a = global [4 x i1] [i1 0, i1 1, i1 0, i1 1]
@b = alias i1* getelementptr ([4 x i1]* @a, i64 0, i64 2)
diff --git a/llvm/test/Bitcode/vectorInstructions.3.2.ll b/llvm/test/Bitcode/vectorInstructions.3.2.ll
index 5b983ac..4daae41 100644
--- a/llvm/test/Bitcode/vectorInstructions.3.2.ll
+++ b/llvm/test/Bitcode/vectorInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; vectorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread vector operations of
diff --git a/llvm/test/Bitcode/visibility-styles.3.2.ll b/llvm/test/Bitcode/visibility-styles.3.2.ll
index cccc950..aecbc65 100644
--- a/llvm/test/Bitcode/visibility-styles.3.2.ll
+++ b/llvm/test/Bitcode/visibility-styles.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; visibility-styles.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread visibility styles of
diff --git a/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll b/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll
index fd543c4..a09efc7 100644
--- a/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll
+++ b/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
; before the IR change on this file.