commit a224f68a10d6191c881dfd27796a2b363aa003d3
author Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> Wed May 01 16:11:11 2019 +0000
committer Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> Wed May 01 16:11:11 2019 +0000
tree f42b965dfd7968f261bb868c9c9e4d25e3edef44
parent 64d57512546e42f45e1f5498e443bc5c580f84f1

[AMDGPU] gfx1010 DS implementation

Differential Revision: https://reviews.llvm.org/D61332

llvm-svn: 359696

llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index e963bc8..e94948e 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -4047,7 +4047,8 @@
   }
 
   AMDGPUOperand::ImmTy OffsetType =
-    (Inst.getOpcode() == AMDGPU::DS_SWIZZLE_B32_si ||
+    (Inst.getOpcode() == AMDGPU::DS_SWIZZLE_B32_gfx10 ||
+     Inst.getOpcode() == AMDGPU::DS_SWIZZLE_B32_gfx6_gfx7 ||
      Inst.getOpcode() == AMDGPU::DS_SWIZZLE_B32_vi) ? AMDGPUOperand::ImmTySwizzle :
                                                       AMDGPUOperand::ImmTyOffset;
 
@@ -5164,7 +5165,7 @@
       continue;
     }
 
-    HasLdsModifier = Op.isLDS();
+    HasLdsModifier |= Op.isLDS();
 
     // Handle tokens like 'offen' which are sometimes hard-coded into the
     // asm string.  There are no MCInst operands for these.