commit a2b9111ef7f07fe81ddf4331164785425f5d5c92
author Andrew Kaylor <andrew.kaylor@intel.com> Mon Apr 25 22:01:04 2016 +0000
committer Andrew Kaylor <andrew.kaylor@intel.com> Mon Apr 25 22:01:04 2016 +0000
tree 54febf9b053ab18b2932241145c49e15b80b32be
parent 1ac98bb088e1913b7e7f686b38bf5550f4eefa99

Add optimization bisect opt-in calls for ARM passes

Differential Revision: http://reviews.llvm.org/D19449

llvm-svn: 267480

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 8e8402f..ff40464 100644
--- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -1887,6 +1887,9 @@
 }
 
 bool ARMLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
+  if (skipFunction(*Fn.getFunction()))
+    return false;
+
   MF = &Fn;
   STI = &static_cast<const ARMSubtarget &>(Fn.getSubtarget());
   TL = STI->getTargetLowering();
@@ -1962,7 +1965,7 @@
                 ARM_PREALLOC_LOAD_STORE_OPT_NAME, false, false)
 
 bool ARMPreAllocLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
-  if (AssumeMisalignedLoadStores)
+  if (AssumeMisalignedLoadStores || skipFunction(*Fn.getFunction()))
     return false;
 
   TD = &Fn.getDataLayout();