Enable machine cse of instructions which define physical registers.
llvm-svn: 105308
diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp
index 6f4f7a8..d8e2ec6 100644
--- a/llvm/lib/CodeGen/MachineCSE.cpp
+++ b/llvm/lib/CodeGen/MachineCSE.cpp
@@ -31,9 +31,6 @@
STATISTIC(NumCoalesces, "Number of copies coalesced");
STATISTIC(NumCSEs, "Number of common subexpression eliminated");
-static cl::opt<bool> CSEPhysDef("machine-cse-phys-defs",
- cl::init(false), cl::Hidden);
-
namespace {
class MachineCSE : public MachineFunctionPass {
const TargetInstrInfo *TII;
@@ -376,7 +373,7 @@
// ... Unless the CS is local and it also defines the physical register
// which is not clobbered in between.
- if (PhysDef && CSEPhysDef) {
+ if (PhysDef) {
unsigned CSVN = VNT.lookup(MI);
MachineInstr *CSMI = Exps[CSVN];
if (PhysRegDefReaches(CSMI, MI, PhysDef))