Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
llvm-svn: 146960
diff --git a/llvm/lib/Analysis/DebugInfo.cpp b/llvm/lib/Analysis/DebugInfo.cpp
index 1f0053d..5008059 100644
--- a/llvm/lib/Analysis/DebugInfo.cpp
+++ b/llvm/lib/Analysis/DebugInfo.cpp
@@ -638,6 +638,32 @@
}
//===----------------------------------------------------------------------===//
+// DIDescriptor: vtable anchors for all descriptors.
+//===----------------------------------------------------------------------===//
+
+void DIScope::anchor() { }
+
+void DICompileUnit::anchor() { }
+
+void DIFile::anchor() { }
+
+void DIType::anchor() { }
+
+void DIBasicType::anchor() { }
+
+void DIDerivedType::anchor() { }
+
+void DICompositeType::anchor() { }
+
+void DISubprogram::anchor() { }
+
+void DILexicalBlock::anchor() { }
+
+void DINameSpace::anchor() { }
+
+void DILexicalBlockFile::anchor() { }
+
+//===----------------------------------------------------------------------===//
// DIDescriptor: dump routines for all descriptors.
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Analysis/DominanceFrontier.cpp b/llvm/lib/Analysis/DominanceFrontier.cpp
index 6de4e1e..1604576 100644
--- a/llvm/lib/Analysis/DominanceFrontier.cpp
+++ b/llvm/lib/Analysis/DominanceFrontier.cpp
@@ -35,6 +35,8 @@
};
}
+void DominanceFrontier::anchor() { }
+
const DominanceFrontier::DomSetType &
DominanceFrontier::calculate(const DominatorTree &DT,
const DomTreeNode *Node) {
diff --git a/llvm/lib/CodeGen/AsmPrinter/DIE.cpp b/llvm/lib/CodeGen/AsmPrinter/DIE.cpp
index 4f2d3e5..64e89e6 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DIE.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DIE.cpp
@@ -174,6 +174,7 @@
}
#endif
+void DIEValue::anchor() { }
#ifndef NDEBUG
void DIEValue::dump() {
diff --git a/llvm/lib/CodeGen/AsmPrinter/DIE.h b/llvm/lib/CodeGen/AsmPrinter/DIE.h
index 265446c..b499625 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DIE.h
+++ b/llvm/lib/CodeGen/AsmPrinter/DIE.h
@@ -195,6 +195,7 @@
/// DIEValue - A debug information entry value.
///
class DIEValue {
+ virtual void anchor();
public:
enum {
isInteger,
diff --git a/llvm/lib/CodeGen/JITCodeEmitter.cpp b/llvm/lib/CodeGen/JITCodeEmitter.cpp
new file mode 100644
index 0000000..96a5389
--- /dev/null
+++ b/llvm/lib/CodeGen/JITCodeEmitter.cpp
@@ -0,0 +1,14 @@
+//===-- llvm/CodeGen/JITCodeEmitter.cpp - Code emission --------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/CodeGen/JITCodeEmitter.h"
+
+using namespace llvm;
+
+void JITCodeEmitter::anchor() { }
diff --git a/llvm/lib/CodeGen/LexicalScopes.cpp b/llvm/lib/CodeGen/LexicalScopes.cpp
index a12e1a3..f1abcbb 100644
--- a/llvm/lib/CodeGen/LexicalScopes.cpp
+++ b/llvm/lib/CodeGen/LexicalScopes.cpp
@@ -311,6 +311,8 @@
return Result;
}
+void LexicalScope::anchor() { }
+
/// dump - Print data structures.
void LexicalScope::dump() const {
#ifndef NDEBUG
diff --git a/llvm/lib/CodeGen/LiveRangeEdit.cpp b/llvm/lib/CodeGen/LiveRangeEdit.cpp
index a470877..08ad0855 100644
--- a/llvm/lib/CodeGen/LiveRangeEdit.cpp
+++ b/llvm/lib/CodeGen/LiveRangeEdit.cpp
@@ -29,6 +29,8 @@
STATISTIC(NumDCEFoldedLoads, "Number of single use loads folded after DCE");
STATISTIC(NumFracRanges, "Number of live ranges fractured by DCE");
+void LiveRangeEdit::Delegate::anchor() { }
+
LiveInterval &LiveRangeEdit::createFrom(unsigned OldReg,
LiveIntervals &LIS,
VirtRegMap &VRM) {
diff --git a/llvm/lib/CodeGen/LiveRangeEdit.h b/llvm/lib/CodeGen/LiveRangeEdit.h
index 057d9bb..29361ac 100644
--- a/llvm/lib/CodeGen/LiveRangeEdit.h
+++ b/llvm/lib/CodeGen/LiveRangeEdit.h
@@ -33,7 +33,9 @@
class LiveRangeEdit {
public:
/// Callback methods for LiveRangeEdit owners.
- struct Delegate {
+ class Delegate {
+ virtual void anchor();
+ public:
/// Called immediately before erasing a dead machine instruction.
virtual void LRE_WillEraseInstruction(MachineInstr *MI) {}
diff --git a/llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp b/llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
index e3cfa9e..dc45e46 100644
--- a/llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
+++ b/llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
@@ -26,6 +26,8 @@
char MachineBranchProbabilityInfo::ID = 0;
+void MachineBranchProbabilityInfo::anchor() { }
+
uint32_t MachineBranchProbabilityInfo::
getSumForBlock(MachineBasicBlock *MBB, uint32_t &Scale) const {
// First we compute the sum with 64-bits of precision, ensuring that cannot
diff --git a/llvm/lib/CodeGen/MachineCodeEmitter.cpp b/llvm/lib/CodeGen/MachineCodeEmitter.cpp
new file mode 100644
index 0000000..81b4978
--- /dev/null
+++ b/llvm/lib/CodeGen/MachineCodeEmitter.cpp
@@ -0,0 +1,14 @@
+//===-- llvm/CodeGen/MachineCodeEmitter.cpp - Code emission -----*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/CodeGen/MachineCodeEmitter.h"
+
+using namespace llvm;
+
+void MachineCodeEmitter::anchor() { }
diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp
index 0c89a57..0f9f970 100644
--- a/llvm/lib/CodeGen/MachineFunction.cpp
+++ b/llvm/lib/CodeGen/MachineFunction.cpp
@@ -619,6 +619,8 @@
// MachineConstantPool implementation
//===----------------------------------------------------------------------===//
+void MachineConstantPoolValue::anchor() { }
+
Type *MachineConstantPoolEntry::getType() const {
if (isMachineConstantPoolEntry())
return Val.MachineCPVal->getType();
diff --git a/llvm/lib/CodeGen/MachinePassRegistry.cpp b/llvm/lib/CodeGen/MachinePassRegistry.cpp
index 9f4ef12..58e067b 100644
--- a/llvm/lib/CodeGen/MachinePassRegistry.cpp
+++ b/llvm/lib/CodeGen/MachinePassRegistry.cpp
@@ -16,6 +16,7 @@
using namespace llvm;
+void MachinePassRegistryListener::anchor() { }
/// Add - Adds a function pass to the registration list.
///
diff --git a/llvm/lib/CodeGen/ScheduleDAG.cpp b/llvm/lib/CodeGen/ScheduleDAG.cpp
index 1e9b5c8..e829668 100644
--- a/llvm/lib/CodeGen/ScheduleDAG.cpp
+++ b/llvm/lib/CodeGen/ScheduleDAG.cpp
@@ -31,6 +31,8 @@
cl::desc("Stress test instruction scheduling"));
#endif
+void SchedulingPriorityQueue::anchor() { }
+
ScheduleDAG::ScheduleDAG(MachineFunction &mf)
: TM(mf.getTarget()),
TII(TM.getInstrInfo()),
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index aa6ef67..1e7bf66 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -262,6 +262,8 @@
// SelectionDAGISel code
//===----------------------------------------------------------------------===//
+void SelectionDAGISel::ISelUpdater::anchor() { }
+
SelectionDAGISel::SelectionDAGISel(const TargetMachine &tm,
CodeGenOpt::Level OL) :
MachineFunctionPass(ID), TM(tm), TLI(*tm.getTargetLowering()),
diff --git a/llvm/lib/CodeGen/Spiller.cpp b/llvm/lib/CodeGen/Spiller.cpp
index 9083804..09fc83b 100644
--- a/llvm/lib/CodeGen/Spiller.cpp
+++ b/llvm/lib/CodeGen/Spiller.cpp
@@ -185,6 +185,8 @@
} // end anonymous namespace
+void Spiller::anchor() { }
+
llvm::Spiller* llvm::createSpiller(MachineFunctionPass &pass,
MachineFunction &mf,
VirtRegMap &vrm) {
diff --git a/llvm/lib/CodeGen/Spiller.h b/llvm/lib/CodeGen/Spiller.h
index 41f1727..b7d5bea 100644
--- a/llvm/lib/CodeGen/Spiller.h
+++ b/llvm/lib/CodeGen/Spiller.h
@@ -22,6 +22,7 @@
/// Implementations are utility classes which insert spill or remat code on
/// demand.
class Spiller {
+ virtual void anchor();
public:
virtual ~Spiller() = 0;
diff --git a/llvm/lib/DebugInfo/DWARFContext.cpp b/llvm/lib/DebugInfo/DWARFContext.cpp
index e1ac398..dccadc4 100644
--- a/llvm/lib/DebugInfo/DWARFContext.cpp
+++ b/llvm/lib/DebugInfo/DWARFContext.cpp
@@ -165,3 +165,5 @@
return DILineInfo(fileName.c_str(), row.Line, row.Column);
}
+
+void DWARFContextInMemory::anchor() { }
diff --git a/llvm/lib/DebugInfo/DWARFContext.h b/llvm/lib/DebugInfo/DWARFContext.h
index 746a463..d2e763a 100644
--- a/llvm/lib/DebugInfo/DWARFContext.h
+++ b/llvm/lib/DebugInfo/DWARFContext.h
@@ -86,6 +86,7 @@
/// DWARFContext. It assumes all content is available in memory and stores
/// pointers to it.
class DWARFContextInMemory : public DWARFContext {
+ virtual void anchor();
StringRef InfoSection;
StringRef AbbrevSection;
StringRef ARangeSection;
diff --git a/llvm/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.cpp b/llvm/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.cpp
new file mode 100644
index 0000000..457fe5e3
--- /dev/null
+++ b/llvm/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.cpp
@@ -0,0 +1,14 @@
+//==-- MCJITMemoryManager.cpp - Definition for the Memory Manager -*-C++ -*-==//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "MCJITMemoryManager.h"
+
+using namespace llvm;
+
+void MCJITMemoryManager::anchor() { }
diff --git a/llvm/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h b/llvm/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h
index 58f9100..bc7080d 100644
--- a/llvm/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h
+++ b/llvm/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h
@@ -21,6 +21,7 @@
// and the RuntimeDyld interface that maps objects, by name, onto their
// matching LLVM IR counterparts in the module(s) being compiled.
class MCJITMemoryManager : public RTDyldMemoryManager {
+ virtual void anchor();
JITMemoryManager *JMM;
// FIXME: Multiple modules.
diff --git a/llvm/lib/MC/MCAsmInfoCOFF.cpp b/llvm/lib/MC/MCAsmInfoCOFF.cpp
index 6d34801..767ac29 100644
--- a/llvm/lib/MC/MCAsmInfoCOFF.cpp
+++ b/llvm/lib/MC/MCAsmInfoCOFF.cpp
@@ -16,6 +16,8 @@
#include "llvm/ADT/SmallVector.h"
using namespace llvm;
+void MCAsmInfoCOFF::anchor() { }
+
MCAsmInfoCOFF::MCAsmInfoCOFF() {
GlobalPrefix = "_";
COMMDirectiveAlignmentIsInBytes = false;
@@ -39,10 +41,14 @@
SupportsDataRegions = false;
}
+void MCAsmInfoMicrosoft::anchor() { }
+
MCAsmInfoMicrosoft::MCAsmInfoMicrosoft() {
AllowQuotesInName = true;
}
+void MCAsmInfoGNUCOFF::anchor() { }
+
MCAsmInfoGNUCOFF::MCAsmInfoGNUCOFF() {
}
diff --git a/llvm/lib/MC/MCAsmInfoDarwin.cpp b/llvm/lib/MC/MCAsmInfoDarwin.cpp
index 24f1243..c1e2635 100644
--- a/llvm/lib/MC/MCAsmInfoDarwin.cpp
+++ b/llvm/lib/MC/MCAsmInfoDarwin.cpp
@@ -18,6 +18,8 @@
#include "llvm/MC/MCStreamer.h"
using namespace llvm;
+void MCAsmInfoDarwin::anchor() { }
+
MCAsmInfoDarwin::MCAsmInfoDarwin() {
// Common settings for all Darwin targets.
// Syntax:
diff --git a/llvm/lib/MC/MCAssembler.cpp b/llvm/lib/MC/MCAssembler.cpp
index c5bf6b9..1cb97ce 100644
--- a/llvm/lib/MC/MCAssembler.cpp
+++ b/llvm/lib/MC/MCAssembler.cpp
@@ -972,3 +972,13 @@
}
OS << "]>\n";
}
+
+// anchors for MC*Fragment vtables
+void MCDataFragment::anchor() { }
+void MCInstFragment::anchor() { }
+void MCAlignFragment::anchor() { }
+void MCFillFragment::anchor() { }
+void MCOrgFragment::anchor() { }
+void MCLEBFragment::anchor() { }
+void MCDwarfLineAddrFragment::anchor() { }
+void MCDwarfCallFrameFragment::anchor() { }
diff --git a/llvm/lib/Object/Archive.cpp b/llvm/lib/Object/Archive.cpp
index 8bdab16..ad1cde0 100644
--- a/llvm/lib/Object/Archive.cpp
+++ b/llvm/lib/Object/Archive.cpp
@@ -74,6 +74,8 @@
return false;
}
+void Archive::anchor() { }
+
Archive::Child Archive::Child::getNext() const {
size_t SpaceToSkip = sizeof(ArchiveMemberHeader) +
ToHeader(Data.data())->getSize();
diff --git a/llvm/lib/Object/ObjectFile.cpp b/llvm/lib/Object/ObjectFile.cpp
index 69d8ed0..d051c03 100644
--- a/llvm/lib/Object/ObjectFile.cpp
+++ b/llvm/lib/Object/ObjectFile.cpp
@@ -21,6 +21,8 @@
using namespace llvm;
using namespace object;
+void ObjectFile::anchor() { }
+
ObjectFile::ObjectFile(unsigned int Type, MemoryBuffer *source, error_code &ec)
: Binary(Type, source) {
}
diff --git a/llvm/lib/Support/IntrusiveRefCntPtr.cpp b/llvm/lib/Support/IntrusiveRefCntPtr.cpp
new file mode 100644
index 0000000..a8b4559
--- /dev/null
+++ b/llvm/lib/Support/IntrusiveRefCntPtr.cpp
@@ -0,0 +1,14 @@
+//== IntrusiveRefCntPtr.cpp - Smart Refcounting Pointer ----------*- C++ -*-==//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/ADT/IntrusiveRefCntPtr.h"
+
+using namespace llvm;
+
+void RefCountedBaseVPTR::anchor() { }
diff --git a/llvm/lib/TableGen/Record.cpp b/llvm/lib/TableGen/Record.cpp
index 7c2ee22..1d6131c 100644
--- a/llvm/lib/TableGen/Record.cpp
+++ b/llvm/lib/TableGen/Record.cpp
@@ -81,6 +81,7 @@
CodeRecTy CodeRecTy::Shared;
DagRecTy DagRecTy::Shared;
+void RecTy::anchor() { }
void RecTy::dump() const { print(errs()); }
ListRecTy *RecTy::getListTy() {
@@ -444,13 +445,18 @@
// Initializer implementations
//===----------------------------------------------------------------------===//
+void Init::anchor() { }
void Init::dump() const { return print(errs()); }
+void UnsetInit::anchor() { }
+
UnsetInit *UnsetInit::get() {
static UnsetInit TheInit;
return &TheInit;
}
+void BitInit::anchor() { }
+
BitInit *BitInit::get(bool V) {
static BitInit True(true);
static BitInit False(false);
@@ -565,6 +571,8 @@
return BitsInit::get(NewBits);
}
+void StringInit::anchor() { }
+
StringInit *StringInit::get(const std::string &V) {
typedef StringMap<StringInit *> Pool;
static Pool ThePool;
@@ -574,6 +582,8 @@
return I;
}
+void CodeInit::anchor() { }
+
CodeInit *CodeInit::get(const std::string &V) {
typedef StringMap<CodeInit *> Pool;
static Pool ThePool;
diff --git a/llvm/lib/TableGen/TableGenAction.cpp b/llvm/lib/TableGen/TableGenAction.cpp
new file mode 100644
index 0000000..54e5083
--- /dev/null
+++ b/llvm/lib/TableGen/TableGenAction.cpp
@@ -0,0 +1,15 @@
+//===- TableGenAction.cpp - defines TableGenAction --------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/TableGen/TableGenAction.h"
+
+using namespace llvm;
+
+void TableGenAction::anchor() { }
+
diff --git a/llvm/lib/TableGen/TableGenBackend.cpp b/llvm/lib/TableGen/TableGenBackend.cpp
index 29588db..328d9a4 100644
--- a/llvm/lib/TableGen/TableGenBackend.cpp
+++ b/llvm/lib/TableGen/TableGenBackend.cpp
@@ -15,6 +15,8 @@
#include "llvm/TableGen/Record.h"
using namespace llvm;
+void TableGenBackend::anchor() { }
+
void TableGenBackend::EmitSourceFileHeader(const std::string &Desc,
raw_ostream &OS) const {
OS << "//===- TableGen'erated file -------------------------------------*-"
diff --git a/llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp b/llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp
new file mode 100644
index 0000000..a770bc5
--- /dev/null
+++ b/llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp
@@ -0,0 +1,14 @@
+//====- ARMMachineFuctionInfo.cpp - ARM machine function info ---*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "ARMMachineFunctionInfo.h"
+
+using namespace llvm;
+
+void ARMFunctionInfo::anchor() { }
diff --git a/llvm/lib/Target/ARM/ARMMachineFunctionInfo.h b/llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
index 138f0c2..96be29f 100644
--- a/llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
+++ b/llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
@@ -25,6 +25,7 @@
/// ARMFunctionInfo - This class is derived from MachineFunctionInfo and
/// contains private ARM-specific information for each MachineFunction.
class ARMFunctionInfo : public MachineFunctionInfo {
+ virtual void anchor();
/// isThumb - True if this function is compiled under Thumb mode.
/// Used to initialized Align, so must precede it.
diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
index 1cba1ba..d6921bb 100644
--- a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -16,6 +16,8 @@
#include "ARMRegisterInfo.h"
using namespace llvm;
+void ARMRegisterInfo::anchor() { }
+
ARMRegisterInfo::ARMRegisterInfo(const ARMBaseInstrInfo &tii,
const ARMSubtarget &sti)
: ARMBaseRegisterInfo(tii, sti) {
diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.h b/llvm/lib/Target/ARM/ARMRegisterInfo.h
index 8edfb9a..15afc1a 100644
--- a/llvm/lib/Target/ARM/ARMRegisterInfo.h
+++ b/llvm/lib/Target/ARM/ARMRegisterInfo.h
@@ -24,6 +24,7 @@
class Type;
struct ARMRegisterInfo : public ARMBaseRegisterInfo {
+ virtual void anchor();
public:
ARMRegisterInfo(const ARMBaseInstrInfo &tii, const ARMSubtarget &STI);
};
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 61b75cb..9d6f9bd 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -34,6 +34,7 @@
RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
}
+
/// TargetMachine ctor - Create an ARM architecture model.
///
ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, StringRef TT,
@@ -50,6 +51,8 @@
this->Options.FloatABIType = FloatABI::Soft;
}
+void ARMTargetMachine::anchor() { }
+
ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
@@ -74,6 +77,8 @@
"support ARM mode execution!");
}
+void ThumbTargetMachine::anchor() { }
+
ThumbTargetMachine::ThumbTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.h b/llvm/lib/Target/ARM/ARMTargetMachine.h
index cd77822..b8a3849 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.h
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.h
@@ -63,6 +63,7 @@
/// ARMTargetMachine - ARM target machine.
///
class ARMTargetMachine : public ARMBaseTargetMachine {
+ virtual void anchor();
ARMInstrInfo InstrInfo;
const TargetData DataLayout; // Calculates type size & alignment
ARMELFWriterInfo ELFWriterInfo;
@@ -103,6 +104,7 @@
/// Thumb-1 and Thumb-2.
///
class ThumbTargetMachine : public ARMBaseTargetMachine {
+ virtual void anchor();
// Either Thumb1InstrInfo or Thumb2InstrInfo.
OwningPtr<ARMBaseInstrInfo> InstrInfo;
const TargetData DataLayout; // Calculates type size & alignment
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
index 1c109e0..d1804a2 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
@@ -48,6 +48,8 @@
0,0
};
+void ARMMCAsmInfoDarwin::anchor() { }
+
ARMMCAsmInfoDarwin::ARMMCAsmInfoDarwin() {
AsmTransCBE = arm_asm_table;
Data64bitsDirective = 0;
@@ -61,6 +63,8 @@
ExceptionsType = ExceptionHandling::SjLj;
}
+void ARMELFMCAsmInfo::anchor() { }
+
ARMELFMCAsmInfo::ARMELFMCAsmInfo() {
// ".comm align is in bytes but .align is pow-2."
AlignmentIsInBytes = false;
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
index 90f7822..e240f4e 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
@@ -18,11 +18,15 @@
namespace llvm {
- struct ARMMCAsmInfoDarwin : public MCAsmInfoDarwin {
+ class ARMMCAsmInfoDarwin : public MCAsmInfoDarwin {
+ virtual void anchor();
+ public:
explicit ARMMCAsmInfoDarwin();
};
- struct ARMELFMCAsmInfo : public MCAsmInfo {
+ class ARMELFMCAsmInfo : public MCAsmInfo {
+ virtual void anchor();
+ public:
explicit ARMELFMCAsmInfo();
};
diff --git a/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.cpp b/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.cpp
index 8c1176a..4bad37e 100644
--- a/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.cpp
+++ b/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.cpp
@@ -14,6 +14,8 @@
#include "SPUMCAsmInfo.h"
using namespace llvm;
+void SPULinuxMCAsmInfo::anchor() { }
+
SPULinuxMCAsmInfo::SPULinuxMCAsmInfo(const Target &T, StringRef TT) {
IsLittleEndian = false;
diff --git a/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.h b/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.h
index 7f850d3..f786147 100644
--- a/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.h
+++ b/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.h
@@ -20,7 +20,9 @@
namespace llvm {
class Target;
- struct SPULinuxMCAsmInfo : public MCAsmInfo {
+ class SPULinuxMCAsmInfo : public MCAsmInfo {
+ virtual void anchor();
+ public:
explicit SPULinuxMCAsmInfo(const Target &T, StringRef TT);
};
} // namespace llvm
diff --git a/llvm/lib/Target/CellSPU/SPUMachineFunction.cpp b/llvm/lib/Target/CellSPU/SPUMachineFunction.cpp
new file mode 100644
index 0000000..5df522e
--- /dev/null
+++ b/llvm/lib/Target/CellSPU/SPUMachineFunction.cpp
@@ -0,0 +1,14 @@
+//==-- SPUMachineFunctionInfo.cpp - Private data used for CellSPU -*- C++ -*-=//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "SPUMachineFunction.h"
+
+using namespace llvm;
+
+void SPUFunctionInfo::anchor() { }
diff --git a/llvm/lib/Target/CellSPU/SPUMachineFunction.h b/llvm/lib/Target/CellSPU/SPUMachineFunction.h
index 3ef3ccb..399684b 100644
--- a/llvm/lib/Target/CellSPU/SPUMachineFunction.h
+++ b/llvm/lib/Target/CellSPU/SPUMachineFunction.h
@@ -21,7 +21,8 @@
/// SPUFunctionInfo - Cell SPU target-specific information for each
/// MachineFunction
class SPUFunctionInfo : public MachineFunctionInfo {
-private:
+ virtual void anchor();
+
/// UsesLR - Indicates whether LR is used in the current function.
///
bool UsesLR;
diff --git a/llvm/lib/Target/MBlaze/MBlazeMachineFunction.cpp b/llvm/lib/Target/MBlaze/MBlazeMachineFunction.cpp
new file mode 100644
index 0000000..c048879
--- /dev/null
+++ b/llvm/lib/Target/MBlaze/MBlazeMachineFunction.cpp
@@ -0,0 +1,14 @@
+//===-- MBlazeMachineFunctionInfo.cpp - Private data --------------*- C++ -*-=//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "MBlazeMachineFunction.h"
+
+using namespace llvm;
+
+void MBlazeFunctionInfo::anchor() { }
diff --git a/llvm/lib/Target/MBlaze/MBlazeMachineFunction.h b/llvm/lib/Target/MBlaze/MBlazeMachineFunction.h
index df39509..7ea8d03 100644
--- a/llvm/lib/Target/MBlaze/MBlazeMachineFunction.h
+++ b/llvm/lib/Target/MBlaze/MBlazeMachineFunction.h
@@ -25,8 +25,8 @@
/// MBlazeFunctionInfo - This class is derived from MachineFunction private
/// MBlaze target-specific information for each MachineFunction.
class MBlazeFunctionInfo : public MachineFunctionInfo {
+ virtual void anchor();
-private:
/// Holds for each function where on the stack the Frame Pointer must be
/// saved. This is used on Prologue and Epilogue to emit FP save/restore
int FPStackOffset;
diff --git a/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.cpp b/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.cpp
index 0d88466..8231f07 100644
--- a/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.cpp
+++ b/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.cpp
@@ -14,6 +14,8 @@
#include "MBlazeMCAsmInfo.h"
using namespace llvm;
+void MBlazeMCAsmInfo::anchor() { }
+
MBlazeMCAsmInfo::MBlazeMCAsmInfo() {
IsLittleEndian = false;
StackGrowsUp = false;
diff --git a/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.h b/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.h
index e68dd58..284309d 100644
--- a/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.h
+++ b/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.h
@@ -21,6 +21,7 @@
class Target;
class MBlazeMCAsmInfo : public MCAsmInfo {
+ virtual void anchor();
public:
explicit MBlazeMCAsmInfo();
};
diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp
index ad7d380b..5e5f3d8 100644
--- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp
+++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp
@@ -14,6 +14,8 @@
#include "MSP430MCAsmInfo.h"
using namespace llvm;
+void MSP430MCAsmInfo::anchor() { }
+
MSP430MCAsmInfo::MSP430MCAsmInfo(const Target &T, StringRef TT) {
PointerSize = 2;
diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h
index f3138a2..17658f5 100644
--- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h
+++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h
@@ -20,7 +20,9 @@
namespace llvm {
class Target;
- struct MSP430MCAsmInfo : public MCAsmInfo {
+ class MSP430MCAsmInfo : public MCAsmInfo {
+ virtual void anchor();
+ public:
explicit MSP430MCAsmInfo(const Target &T, StringRef TT);
};
diff --git a/llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp b/llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp
new file mode 100644
index 0000000..91058a4
--- /dev/null
+++ b/llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp
@@ -0,0 +1,14 @@
+//==- MSP430MachineFuctionInfo.cpp - MSP430 machine function info -*- C++ -*-=//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "MSP430MachineFunctionInfo.h"
+
+using namespace llvm;
+
+void MSP430MachineFunctionInfo::anchor() { }
diff --git a/llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.h b/llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.h
index 383fd2e..632d6de 100644
--- a/llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.h
+++ b/llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.h
@@ -21,6 +21,8 @@
/// MSP430MachineFunctionInfo - This class is derived from MachineFunction and
/// contains private MSP430 target-specific information for each MachineFunction.
class MSP430MachineFunctionInfo : public MachineFunctionInfo {
+ virtual void anchor();
+
/// CalleeSavedFrameSize - Size of the callee-saved register portion of the
/// stack frame in bytes.
unsigned CalleeSavedFrameSize;
diff --git a/llvm/lib/Target/MSP430/MSP430Subtarget.cpp b/llvm/lib/Target/MSP430/MSP430Subtarget.cpp
index 3ee14d9..f47f4cb 100644
--- a/llvm/lib/Target/MSP430/MSP430Subtarget.cpp
+++ b/llvm/lib/Target/MSP430/MSP430Subtarget.cpp
@@ -21,6 +21,8 @@
using namespace llvm;
+void MSP430Subtarget::anchor() { }
+
MSP430Subtarget::MSP430Subtarget(const std::string &TT,
const std::string &CPU,
const std::string &FS) :
diff --git a/llvm/lib/Target/MSP430/MSP430Subtarget.h b/llvm/lib/Target/MSP430/MSP430Subtarget.h
index 1ce5f11..3743346 100644
--- a/llvm/lib/Target/MSP430/MSP430Subtarget.h
+++ b/llvm/lib/Target/MSP430/MSP430Subtarget.h
@@ -25,6 +25,7 @@
class StringRef;
class MSP430Subtarget : public MSP430GenSubtargetInfo {
+ virtual void anchor();
bool ExtendedInsts;
public:
/// This constructor initializes the data members to match that
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
index 71ae804..c72af7d 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
@@ -16,6 +16,8 @@
using namespace llvm;
+void MipsMCAsmInfo::anchor() { }
+
MipsMCAsmInfo::MipsMCAsmInfo(const Target &T, StringRef TT) {
Triple TheTriple(TT);
if ((TheTriple.getArch() == Triple::mips) ||
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
index 41b7192..859685d 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
@@ -21,6 +21,7 @@
class Target;
class MipsMCAsmInfo : public MCAsmInfo {
+ virtual void anchor();
public:
explicit MipsMCAsmInfo(const Target &T, StringRef TT);
};
diff --git a/llvm/lib/Target/Mips/MipsMachineFunction.cpp b/llvm/lib/Target/Mips/MipsMachineFunction.cpp
new file mode 100644
index 0000000..5f3c75f
--- /dev/null
+++ b/llvm/lib/Target/Mips/MipsMachineFunction.cpp
@@ -0,0 +1,14 @@
+//===-- MipsMachineFunctionInfo.cpp - Private data used for Mips --*- C++ -*-=//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "MipsMachineFunction.h"
+
+using namespace llvm;
+
+void MipsFunctionInfo::anchor() { }
diff --git a/llvm/lib/Target/Mips/MipsMachineFunction.h b/llvm/lib/Target/Mips/MipsMachineFunction.h
index bc30b6b2..31448a8 100644
--- a/llvm/lib/Target/Mips/MipsMachineFunction.h
+++ b/llvm/lib/Target/Mips/MipsMachineFunction.h
@@ -25,8 +25,8 @@
/// MipsFunctionInfo - This class is derived from MachineFunction private
/// Mips target-specific information for each MachineFunction.
class MipsFunctionInfo : public MachineFunctionInfo {
+ virtual void anchor();
-private:
MachineFunction& MF;
/// SRetReturnReg - Some subtargets require that sret lowering includes
/// returning the value of the returned struct in a register. This field
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp b/llvm/lib/Target/Mips/MipsSubtarget.cpp
index dc299f2..2ecee80 100644
--- a/llvm/lib/Target/Mips/MipsSubtarget.cpp
+++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp
@@ -21,6 +21,8 @@
using namespace llvm;
+void MipsSubtarget::anchor() { }
+
MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool little) :
MipsGenSubtargetInfo(TT, CPU, FS),
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.h b/llvm/lib/Target/Mips/MipsSubtarget.h
index d9dddad..0c6dc52 100644
--- a/llvm/lib/Target/Mips/MipsSubtarget.h
+++ b/llvm/lib/Target/Mips/MipsSubtarget.h
@@ -25,6 +25,7 @@
class StringRef;
class MipsSubtarget : public MipsGenSubtargetInfo {
+ virtual void anchor();
public:
// NOTE: O64 will not be supported.
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index 02887fa..6088cee 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -52,6 +52,8 @@
TLInfo(*this), TSInfo(*this), JITInfo() {
}
+void MipsebTargetMachine::anchor() { }
+
MipsebTargetMachine::
MipsebTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS, const TargetOptions &Options,
@@ -59,6 +61,8 @@
CodeGenOpt::Level OL)
: MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
+void MipselTargetMachine::anchor() { }
+
MipselTargetMachine::
MipselTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS, const TargetOptions &Options,
@@ -66,6 +70,8 @@
CodeGenOpt::Level OL)
: MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
+void Mips64ebTargetMachine::anchor() { }
+
Mips64ebTargetMachine::
Mips64ebTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS, const TargetOptions &Options,
@@ -73,6 +79,8 @@
CodeGenOpt::Level OL)
: MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
+void Mips64elTargetMachine::anchor() { }
+
Mips64elTargetMachine::
Mips64elTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.h b/llvm/lib/Target/Mips/MipsTargetMachine.h
index 6842373..6e88956 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.h
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.h
@@ -80,6 +80,7 @@
/// MipsebTargetMachine - Mips32 big endian target machine.
///
class MipsebTargetMachine : public MipsTargetMachine {
+ virtual void anchor();
public:
MipsebTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS, const TargetOptions &Options,
@@ -90,6 +91,7 @@
/// MipselTargetMachine - Mips32 little endian target machine.
///
class MipselTargetMachine : public MipsTargetMachine {
+ virtual void anchor();
public:
MipselTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS, const TargetOptions &Options,
@@ -100,6 +102,7 @@
/// Mips64ebTargetMachine - Mips64 big endian target machine.
///
class Mips64ebTargetMachine : public MipsTargetMachine {
+ virtual void anchor();
public:
Mips64ebTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
@@ -111,6 +114,7 @@
/// Mips64elTargetMachine - Mips64 little endian target machine.
///
class Mips64elTargetMachine : public MipsTargetMachine {
+ virtual void anchor();
public:
Mips64elTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
diff --git a/llvm/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.cpp b/llvm/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.cpp
index efefead..cdfbc80 100644
--- a/llvm/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.cpp
+++ b/llvm/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.cpp
@@ -16,6 +16,8 @@
using namespace llvm;
+void PTXMCAsmInfo::anchor() { }
+
PTXMCAsmInfo::PTXMCAsmInfo(const Target &T, const StringRef &TT) {
Triple TheTriple(TT);
if (TheTriple.getArch() == Triple::ptx64)
diff --git a/llvm/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.h b/llvm/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.h
index 03f5d66..c4c8890 100644
--- a/llvm/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.h
+++ b/llvm/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.h
@@ -20,7 +20,9 @@
class Target;
class StringRef;
- struct PTXMCAsmInfo : public MCAsmInfo {
+ class PTXMCAsmInfo : public MCAsmInfo {
+ virtual void anchor();
+ public:
explicit PTXMCAsmInfo(const Target &T, const StringRef &TT);
};
} // namespace llvm
diff --git a/llvm/lib/Target/PTX/PTXMachineFunctionInfo.cpp b/llvm/lib/Target/PTX/PTXMachineFunctionInfo.cpp
new file mode 100644
index 0000000..d471d4c
--- /dev/null
+++ b/llvm/lib/Target/PTX/PTXMachineFunctionInfo.cpp
@@ -0,0 +1,14 @@
+//===- PTXMachineFuctionInfo.cpp - PTX machine function info -----*- C++ -*-==//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "PTXMachineFunctionInfo.h"
+
+using namespace llvm;
+
+void PTXMachineFunctionInfo::anchor() { }
diff --git a/llvm/lib/Target/PTX/PTXMachineFunctionInfo.h b/llvm/lib/Target/PTX/PTXMachineFunctionInfo.h
index 1a2878c..3229f5f 100644
--- a/llvm/lib/Target/PTX/PTXMachineFunctionInfo.h
+++ b/llvm/lib/Target/PTX/PTXMachineFunctionInfo.h
@@ -30,7 +30,7 @@
/// contains private PTX target-specific information for each MachineFunction.
///
class PTXMachineFunctionInfo : public MachineFunctionInfo {
-private:
+ virtual void anchor();
bool IsKernel;
DenseSet<unsigned> RegArgs;
DenseSet<unsigned> RegRets;
diff --git a/llvm/lib/Target/PTX/PTXSubtarget.cpp b/llvm/lib/Target/PTX/PTXSubtarget.cpp
index 1eb57d2..03cbb24 100644
--- a/llvm/lib/Target/PTX/PTXSubtarget.cpp
+++ b/llvm/lib/Target/PTX/PTXSubtarget.cpp
@@ -22,6 +22,8 @@
using namespace llvm;
+void PTXSubtarget::anchor() { }
+
PTXSubtarget::PTXSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit)
: PTXGenSubtargetInfo(TT, CPU, FS),
diff --git a/llvm/lib/Target/PTX/PTXSubtarget.h b/llvm/lib/Target/PTX/PTXSubtarget.h
index b946d7c..15b3d44 100644
--- a/llvm/lib/Target/PTX/PTXSubtarget.h
+++ b/llvm/lib/Target/PTX/PTXSubtarget.h
@@ -23,6 +23,7 @@
class StringRef;
class PTXSubtarget : public PTXGenSubtargetInfo {
+ virtual void anchor();
public:
/**
diff --git a/llvm/lib/Target/PTX/PTXTargetMachine.cpp b/llvm/lib/Target/PTX/PTXTargetMachine.cpp
index 4efdc27..fb9dc60 100644
--- a/llvm/lib/Target/PTX/PTXTargetMachine.cpp
+++ b/llvm/lib/Target/PTX/PTXTargetMachine.cpp
@@ -85,6 +85,8 @@
TLInfo(*this) {
}
+void PTX32TargetMachine::anchor() { }
+
PTX32TargetMachine::PTX32TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
@@ -93,6 +95,8 @@
: PTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
}
+void PTX64TargetMachine::anchor() { }
+
PTX64TargetMachine::PTX64TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
diff --git a/llvm/lib/Target/PTX/PTXTargetMachine.h b/llvm/lib/Target/PTX/PTXTargetMachine.h
index 22911f7..b051348 100644
--- a/llvm/lib/Target/PTX/PTXTargetMachine.h
+++ b/llvm/lib/Target/PTX/PTXTargetMachine.h
@@ -91,6 +91,7 @@
class PTX32TargetMachine : public PTXTargetMachine {
+ virtual void anchor();
public:
PTX32TargetMachine(const Target &T, StringRef TT,
@@ -100,6 +101,7 @@
}; // class PTX32TargetMachine
class PTX64TargetMachine : public PTXTargetMachine {
+ virtual void anchor();
public:
PTX64TargetMachine(const Target &T, StringRef TT,
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
index e9424d8..94465d7 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
@@ -14,6 +14,8 @@
#include "PPCMCAsmInfo.h"
using namespace llvm;
+void PPCMCAsmInfoDarwin::anchor() { }
+
PPCMCAsmInfoDarwin::PPCMCAsmInfoDarwin(bool is64Bit) {
if (is64Bit)
PointerSize = 8;
@@ -30,6 +32,8 @@
SupportsDebugInformation= true; // Debug information.
}
+void PPCLinuxMCAsmInfo::anchor() { }
+
PPCLinuxMCAsmInfo::PPCLinuxMCAsmInfo(bool is64Bit) {
if (is64Bit)
PointerSize = 8;
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
index 96ae6fb..cf11cbc 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
@@ -18,11 +18,15 @@
namespace llvm {
- struct PPCMCAsmInfoDarwin : public MCAsmInfoDarwin {
+ class PPCMCAsmInfoDarwin : public MCAsmInfoDarwin {
+ virtual void anchor();
+ public:
explicit PPCMCAsmInfoDarwin(bool is64Bit);
};
- struct PPCLinuxMCAsmInfo : public MCAsmInfo {
+ class PPCLinuxMCAsmInfo : public MCAsmInfo {
+ virtual void anchor();
+ public:
explicit PPCLinuxMCAsmInfo(bool is64Bit);
};
diff --git a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp
new file mode 100644
index 0000000..238e4d1
--- /dev/null
+++ b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp
@@ -0,0 +1,15 @@
+//=-- PPCMachineFunctionInfo.cpp - Private data used for PowerPC --*- C++ -*-=//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "PPCMachineFunctionInfo.h"
+
+using namespace llvm;
+
+void PPCFunctionInfo::anchor() { }
+
diff --git a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
index e2649c8..24caffa 100644
--- a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
@@ -21,7 +21,8 @@
/// PPCFunctionInfo - This class is derived from MachineFunction private
/// PowerPC target-specific information for each MachineFunction.
class PPCFunctionInfo : public MachineFunctionInfo {
-private:
+ virtual void anchor();
+
/// FramePointerSaveIndex - Frame index of where the old frame pointer is
/// stored. Also used as an anchor for instructions that need to be altered
/// when using frame pointers (dyna_add, dyna_sub.)
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index 8e71c46..919ada7 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -44,6 +44,8 @@
/// groups, which typically degrades performance.
bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
+void PPC32TargetMachine::anchor() { }
+
PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
@@ -52,6 +54,7 @@
: PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
}
+void PPC64TargetMachine::anchor() { }
PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.h b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
index 0427876..560de52 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.h
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
@@ -77,6 +77,7 @@
/// PPC32TargetMachine - PowerPC 32-bit target machine.
///
class PPC32TargetMachine : public PPCTargetMachine {
+ virtual void anchor();
public:
PPC32TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS, const TargetOptions &Options,
@@ -87,6 +88,7 @@
/// PPC64TargetMachine - PowerPC 64-bit target machine.
///
class PPC64TargetMachine : public PPCTargetMachine {
+ virtual void anchor();
public:
PPC64TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS, const TargetOptions &Options,
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
index 6a7e090..f5e10fc 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
@@ -16,6 +16,8 @@
using namespace llvm;
+void SparcELFMCAsmInfo::anchor() { }
+
SparcELFMCAsmInfo::SparcELFMCAsmInfo(const Target &T, StringRef TT) {
IsLittleEndian = false;
Triple TheTriple(TT);
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
index 0cb6827..9335923 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
@@ -20,7 +20,9 @@
namespace llvm {
class Target;
- struct SparcELFMCAsmInfo : public MCAsmInfo {
+ class SparcELFMCAsmInfo : public MCAsmInfo {
+ virtual void anchor();
+ public:
explicit SparcELFMCAsmInfo(const Target &T, StringRef TT);
};
diff --git a/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.cpp b/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.cpp
new file mode 100644
index 0000000..efc37a3
--- /dev/null
+++ b/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.cpp
@@ -0,0 +1,14 @@
+//==- SparcMachineFunctionInfo.cpp - Sparc Machine Function Info -*- C++ -*-==//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "SparcMachineFunctionInfo.h"
+
+using namespace llvm;
+
+void SparcMachineFunctionInfo::anchor() { }
diff --git a/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.h b/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.h
index 0b74308e..90c27a4 100644
--- a/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.h
+++ b/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.h
@@ -18,6 +18,7 @@
namespace llvm {
class SparcMachineFunctionInfo : public MachineFunctionInfo {
+ virtual void anchor();
private:
unsigned GlobalBaseReg;
diff --git a/llvm/lib/Target/Sparc/SparcSubtarget.cpp b/llvm/lib/Target/Sparc/SparcSubtarget.cpp
index 6c501cf..7ffd4da 100644
--- a/llvm/lib/Target/Sparc/SparcSubtarget.cpp
+++ b/llvm/lib/Target/Sparc/SparcSubtarget.cpp
@@ -21,6 +21,8 @@
using namespace llvm;
+void SparcSubtarget::anchor() { }
+
SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit) :
SparcGenSubtargetInfo(TT, CPU, FS),
diff --git a/llvm/lib/Target/Sparc/SparcSubtarget.h b/llvm/lib/Target/Sparc/SparcSubtarget.h
index 00a04c3..2846447 100644
--- a/llvm/lib/Target/Sparc/SparcSubtarget.h
+++ b/llvm/lib/Target/Sparc/SparcSubtarget.h
@@ -24,6 +24,7 @@
class StringRef;
class SparcSubtarget : public SparcGenSubtargetInfo {
+ virtual void anchor();
bool IsV9;
bool V8DeprecatedInsts;
bool IsVIS;
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
index 8e16fd7..cfb2343 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -51,6 +51,8 @@
return true;
}
+void SparcV8TargetMachine::anchor() { }
+
SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
StringRef TT, StringRef CPU,
StringRef FS,
@@ -61,6 +63,8 @@
: SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
}
+void SparcV9TargetMachine::anchor() { }
+
SparcV9TargetMachine::SparcV9TargetMachine(const Target &T,
StringRef TT, StringRef CPU,
StringRef FS,
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.h b/llvm/lib/Target/Sparc/SparcTargetMachine.h
index cedc1e3..6284345 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.h
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.h
@@ -62,6 +62,7 @@
/// SparcV8TargetMachine - Sparc 32-bit target machine
///
class SparcV8TargetMachine : public SparcTargetMachine {
+ virtual void anchor();
public:
SparcV8TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
@@ -73,6 +74,7 @@
/// SparcV9TargetMachine - Sparc 64-bit target machine
///
class SparcV9TargetMachine : public SparcTargetMachine {
+ virtual void anchor();
public:
SparcV9TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
diff --git a/llvm/lib/Target/TargetJITInfo.cpp b/llvm/lib/Target/TargetJITInfo.cpp
new file mode 100644
index 0000000..aafedf8
--- /dev/null
+++ b/llvm/lib/Target/TargetJITInfo.cpp
@@ -0,0 +1,14 @@
+//===- Target/TargetJITInfo.h - Target Information for JIT ------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/Target/TargetJITInfo.h"
+
+using namespace llvm;
+
+void TargetJITInfo::anchor() { }
diff --git a/llvm/lib/Target/TargetLibraryInfo.cpp b/llvm/lib/Target/TargetLibraryInfo.cpp
index 768facb..2119c4e 100644
--- a/llvm/lib/Target/TargetLibraryInfo.cpp
+++ b/llvm/lib/Target/TargetLibraryInfo.cpp
@@ -20,6 +20,8 @@
"Target Library Information", false, true)
char TargetLibraryInfo::ID = 0;
+void TargetLibraryInfo::anchor() { }
+
const char* TargetLibraryInfo::StandardNames[LibFunc::NumLibFuncs] =
{
"acos",
diff --git a/llvm/lib/Target/TargetRegisterInfo.cpp b/llvm/lib/Target/TargetRegisterInfo.cpp
index 2689837..ad66319 100644
--- a/llvm/lib/Target/TargetRegisterInfo.cpp
+++ b/llvm/lib/Target/TargetRegisterInfo.cpp
@@ -18,6 +18,8 @@
using namespace llvm;
+void TargetRegisterClass::anchor() { }
+
TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterInfoDesc *ID,
regclass_iterator RCB, regclass_iterator RCE,
const char *const *subregindexnames)
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
index 3aacb20..5b7316e 100644
--- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -79,6 +79,12 @@
return instInfoX86;
}
+void X86_16Disassembler::anchor() { }
+
+void X86_32Disassembler::anchor() { }
+
+void X86_64Disassembler::anchor() { }
+
/// regionReader - a callback function that wraps the readByte method from
/// MemoryObject.
///
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.h b/llvm/lib/Target/X86/Disassembler/X86Disassembler.h
index 6ac9a0f..d99236b 100644
--- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.h
+++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.h
@@ -128,6 +128,7 @@
/// X86_16Disassembler - 16-bit X86 disassembler.
class X86_16Disassembler : public X86GenericDisassembler {
+ virtual void anchor();
public:
X86_16Disassembler(const MCSubtargetInfo &STI) :
X86GenericDisassembler(STI, MODE_16BIT) {
@@ -136,6 +137,7 @@
/// X86_16Disassembler - 32-bit X86 disassembler.
class X86_32Disassembler : public X86GenericDisassembler {
+ virtual void anchor();
public:
X86_32Disassembler(const MCSubtargetInfo &STI) :
X86GenericDisassembler(STI, MODE_32BIT) {
@@ -144,6 +146,7 @@
/// X86_16Disassembler - 64-bit X86 disassembler.
class X86_64Disassembler : public X86GenericDisassembler {
+ virtual void anchor();
public:
X86_64Disassembler(const MCSubtargetInfo &STI) :
X86GenericDisassembler(STI, MODE_64BIT) {
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
index eb64ad1..003a14a 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
@@ -48,6 +48,8 @@
"{cc}", "cc",
0,0};
+void X86MCAsmInfoDarwin::anchor() { }
+
X86MCAsmInfoDarwin::X86MCAsmInfoDarwin(const Triple &T) {
bool is64Bit = T.getArch() == Triple::x86_64;
if (is64Bit)
@@ -80,6 +82,8 @@
: X86MCAsmInfoDarwin(Triple) {
}
+void X86ELFMCAsmInfo::anchor() { }
+
X86ELFMCAsmInfo::X86ELFMCAsmInfo(const Triple &T) {
if (T.getArch() == Triple::x86_64)
PointerSize = 8;
@@ -125,6 +129,8 @@
0, SectionKind::getMetadata());
}
+void X86MCAsmInfoMicrosoft::anchor() { }
+
X86MCAsmInfoMicrosoft::X86MCAsmInfoMicrosoft(const Triple &Triple) {
if (Triple.getArch() == Triple::x86_64) {
GlobalPrefix = "";
@@ -137,6 +143,8 @@
TextAlignFillValue = 0x90;
}
+void X86MCAsmInfoGNUCOFF::anchor() { }
+
X86MCAsmInfoGNUCOFF::X86MCAsmInfoGNUCOFF(const Triple &Triple) {
if (Triple.getArch() == Triple::x86_64) {
GlobalPrefix = "";
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h
index 5d619e8..57019c7 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h
@@ -21,7 +21,9 @@
namespace llvm {
class Triple;
- struct X86MCAsmInfoDarwin : public MCAsmInfoDarwin {
+ class X86MCAsmInfoDarwin : public MCAsmInfoDarwin {
+ virtual void anchor();
+ public:
explicit X86MCAsmInfoDarwin(const Triple &Triple);
};
@@ -33,16 +35,22 @@
MCStreamer &Streamer) const;
};
- struct X86ELFMCAsmInfo : public MCAsmInfo {
+ class X86ELFMCAsmInfo : public MCAsmInfo {
+ virtual void anchor();
+ public:
explicit X86ELFMCAsmInfo(const Triple &Triple);
virtual const MCSection *getNonexecutableStackSection(MCContext &Ctx) const;
};
- struct X86MCAsmInfoMicrosoft : public MCAsmInfoMicrosoft {
+ class X86MCAsmInfoMicrosoft : public MCAsmInfoMicrosoft {
+ virtual void anchor();
+ public:
explicit X86MCAsmInfoMicrosoft(const Triple &Triple);
};
- struct X86MCAsmInfoGNUCOFF : public MCAsmInfoGNUCOFF {
+ class X86MCAsmInfoGNUCOFF : public MCAsmInfoGNUCOFF {
+ virtual void anchor();
+ public:
explicit X86MCAsmInfoGNUCOFF(const Triple &Triple);
};
} // namespace llvm
diff --git a/llvm/lib/Target/X86/X86MachineFunctionInfo.cpp b/llvm/lib/Target/X86/X86MachineFunctionInfo.cpp
new file mode 100644
index 0000000..de88489
--- /dev/null
+++ b/llvm/lib/Target/X86/X86MachineFunctionInfo.cpp
@@ -0,0 +1,14 @@
+//====- X86MachineFuctionInfo.cpp - X86 machine function info ---*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "X86MachineFunctionInfo.h"
+
+using namespace llvm;
+
+void X86MachineFunctionInfo::anchor() { }
diff --git a/llvm/lib/Target/X86/X86MachineFunctionInfo.h b/llvm/lib/Target/X86/X86MachineFunctionInfo.h
index b0bb313..b73f67d 100644
--- a/llvm/lib/Target/X86/X86MachineFunctionInfo.h
+++ b/llvm/lib/Target/X86/X86MachineFunctionInfo.h
@@ -21,6 +21,8 @@
/// X86MachineFunctionInfo - This class is derived from MachineFunction and
/// contains private X86 target-specific information for each MachineFunction.
class X86MachineFunctionInfo : public MachineFunctionInfo {
+ virtual void anchor();
+
/// ForceFramePointer - True if the function is required to use of frame
/// pointer for reasons other than it containing dynamic allocation or
/// that FP eliminatation is turned off. For example, Cygwin main function
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 126042e..399d8e9 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -28,6 +28,7 @@
RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
}
+void X86_32TargetMachine::anchor() { }
X86_32TargetMachine::X86_32TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
@@ -50,6 +51,7 @@
JITInfo(*this) {
}
+void X86_64TargetMachine::anchor() { }
X86_64TargetMachine::X86_64TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
diff --git a/llvm/lib/Target/X86/X86TargetMachine.h b/llvm/lib/Target/X86/X86TargetMachine.h
index 3ac1769..16092b8e 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.h
+++ b/llvm/lib/Target/X86/X86TargetMachine.h
@@ -78,6 +78,7 @@
/// X86_32TargetMachine - X86 32-bit target machine.
///
class X86_32TargetMachine : public X86TargetMachine {
+ virtual void anchor();
const TargetData DataLayout; // Calculates type size & alignment
X86InstrInfo InstrInfo;
X86SelectionDAGInfo TSInfo;
@@ -106,6 +107,7 @@
/// X86_64TargetMachine - X86 64-bit target machine.
///
class X86_64TargetMachine : public X86TargetMachine {
+ virtual void anchor();
const TargetData DataLayout; // Calculates type size & alignment
X86InstrInfo InstrInfo;
X86SelectionDAGInfo TSInfo;
diff --git a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp
index 42ab1b3..64f1a8e 100644
--- a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp
+++ b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp
@@ -10,6 +10,8 @@
#include "XCoreMCAsmInfo.h"
using namespace llvm;
+void XCoreMCAsmInfo::anchor() { }
+
XCoreMCAsmInfo::XCoreMCAsmInfo(const Target &T, StringRef TT) {
SupportsDebugInformation = true;
Data16bitsDirective = "\t.short\t";
diff --git a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h
index 8403922..f9e0290 100644
--- a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h
+++ b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h
@@ -21,6 +21,7 @@
class Target;
class XCoreMCAsmInfo : public MCAsmInfo {
+ virtual void anchor();
public:
explicit XCoreMCAsmInfo(const Target &T, StringRef TT);
};
diff --git a/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.cpp b/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.cpp
new file mode 100644
index 0000000..e782bbe
--- /dev/null
+++ b/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.cpp
@@ -0,0 +1,14 @@
+//===- XCoreMachineFuctionInfo.cpp - XCore machine function info -*- C++ -*-==//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "XCoreMachineFunctionInfo.h"
+
+using namespace llvm;
+
+void XCoreFunctionInfo::anchor() { }
diff --git a/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.h b/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.h
index a575a0f..d2ef9b7 100644
--- a/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.h
+++ b/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.h
@@ -26,7 +26,7 @@
/// XCoreFunctionInfo - This class is derived from MachineFunction private
/// XCore target-specific information for each MachineFunction.
class XCoreFunctionInfo : public MachineFunctionInfo {
-private:
+ virtual void anchor();
bool UsesLR;
int LRSpillSlot;
int FPSpillSlot;
diff --git a/llvm/lib/Target/XCore/XCoreSubtarget.cpp b/llvm/lib/Target/XCore/XCoreSubtarget.cpp
index b4e9927..78a1469 100644
--- a/llvm/lib/Target/XCore/XCoreSubtarget.cpp
+++ b/llvm/lib/Target/XCore/XCoreSubtarget.cpp
@@ -21,6 +21,8 @@
using namespace llvm;
+void XCoreSubtarget::anchor() { }
+
XCoreSubtarget::XCoreSubtarget(const std::string &TT,
const std::string &CPU, const std::string &FS)
: XCoreGenSubtargetInfo(TT, CPU, FS)
diff --git a/llvm/lib/Target/XCore/XCoreSubtarget.h b/llvm/lib/Target/XCore/XCoreSubtarget.h
index 7b29fa2..2175e5a 100644
--- a/llvm/lib/Target/XCore/XCoreSubtarget.h
+++ b/llvm/lib/Target/XCore/XCoreSubtarget.h
@@ -25,6 +25,7 @@
class StringRef;
class XCoreSubtarget : public XCoreGenSubtargetInfo {
+ virtual void anchor();
public:
/// This constructor initializes the data members to match that
diff --git a/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp b/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
index 6732a78..20eef3c 100644
--- a/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
@@ -375,6 +375,8 @@
namespace llvm {
+void IVVisitor::anchor() { }
+
/// simplifyUsersOfIV - Simplify instructions that use this induction variable
/// by using ScalarEvolution to analyze the IV's recurrence.
bool simplifyUsersOfIV(PHINode *CurrIV, ScalarEvolution *SE, LPPassManager *LPM,
diff --git a/llvm/lib/VMCore/Constants.cpp b/llvm/lib/VMCore/Constants.cpp
index f17f9a2..ba8c31b 100644
--- a/llvm/lib/VMCore/Constants.cpp
+++ b/llvm/lib/VMCore/Constants.cpp
@@ -40,6 +40,8 @@
// Constant Class
//===----------------------------------------------------------------------===//
+void Constant::anchor() { }
+
bool Constant::isNegativeZeroValue() const {
// Floating point values have an explicit -0.0 value.
if (const ConstantFP *CFP = dyn_cast<ConstantFP>(this))
@@ -363,6 +365,8 @@
// ConstantInt
//===----------------------------------------------------------------------===//
+void ConstantInt::anchor() { }
+
ConstantInt::ConstantInt(IntegerType *Ty, const APInt& V)
: Constant(Ty, ConstantIntVal, 0, 0), Val(V) {
assert(V.getBitWidth() == Ty->getBitWidth() && "Invalid constant for type");
@@ -486,6 +490,8 @@
return &APFloat::PPCDoubleDouble;
}
+void ConstantFP::anchor() { }
+
/// get() - This returns a constant fp for the specified value in the
/// specified type. This should only be used for simple constant values like
/// 2.0/1.0 etc, that are known-valid both as double and as the target format.
diff --git a/llvm/lib/VMCore/ConstantsContext.h b/llvm/lib/VMCore/ConstantsContext.h
index 1077004..cfcdf13 100644
--- a/llvm/lib/VMCore/ConstantsContext.h
+++ b/llvm/lib/VMCore/ConstantsContext.h
@@ -30,6 +30,7 @@
/// UnaryConstantExpr - This class is private to Constants.cpp, and is used
/// behind the scenes to implement unary constant exprs.
class UnaryConstantExpr : public ConstantExpr {
+ virtual void anchor();
void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
public:
// allocate space for exactly one operand
@@ -46,6 +47,7 @@
/// BinaryConstantExpr - This class is private to Constants.cpp, and is used
/// behind the scenes to implement binary constant exprs.
class BinaryConstantExpr : public ConstantExpr {
+ virtual void anchor();
void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
public:
// allocate space for exactly two operands
@@ -66,6 +68,7 @@
/// SelectConstantExpr - This class is private to Constants.cpp, and is used
/// behind the scenes to implement select constant exprs.
class SelectConstantExpr : public ConstantExpr {
+ virtual void anchor();
void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
public:
// allocate space for exactly three operands
@@ -86,6 +89,7 @@
/// Constants.cpp, and is used behind the scenes to implement
/// extractelement constant exprs.
class ExtractElementConstantExpr : public ConstantExpr {
+ virtual void anchor();
void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
public:
// allocate space for exactly two operands
@@ -106,6 +110,7 @@
/// Constants.cpp, and is used behind the scenes to implement
/// insertelement constant exprs.
class InsertElementConstantExpr : public ConstantExpr {
+ virtual void anchor();
void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
public:
// allocate space for exactly three operands
@@ -127,6 +132,7 @@
/// Constants.cpp, and is used behind the scenes to implement
/// shufflevector constant exprs.
class ShuffleVectorConstantExpr : public ConstantExpr {
+ virtual void anchor();
void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
public:
// allocate space for exactly three operands
@@ -151,6 +157,7 @@
/// Constants.cpp, and is used behind the scenes to implement
/// extractvalue constant exprs.
class ExtractValueConstantExpr : public ConstantExpr {
+ virtual void anchor();
void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
public:
// allocate space for exactly one operand
@@ -176,6 +183,7 @@
/// Constants.cpp, and is used behind the scenes to implement
/// insertvalue constant exprs.
class InsertValueConstantExpr : public ConstantExpr {
+ virtual void anchor();
void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
public:
// allocate space for exactly one operand
@@ -202,6 +210,7 @@
/// GetElementPtrConstantExpr - This class is private to Constants.cpp, and is
/// used behind the scenes to implement getelementpr constant exprs.
class GetElementPtrConstantExpr : public ConstantExpr {
+ virtual void anchor();
GetElementPtrConstantExpr(Constant *C, const std::vector<Constant*> &IdxList,
Type *DestTy);
public:
@@ -221,8 +230,10 @@
// CompareConstantExpr - This class is private to Constants.cpp, and is used
// behind the scenes to implement ICmp and FCmp constant expressions. This is
// needed in order to store the predicate value for these instructions.
-struct CompareConstantExpr : public ConstantExpr {
+class CompareConstantExpr : public ConstantExpr {
+ virtual void anchor();
void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
+public:
// allocate space for exactly two operands
void *operator new(size_t s) {
return User::operator new(s, 2);
diff --git a/llvm/lib/VMCore/Function.cpp b/llvm/lib/VMCore/Function.cpp
index bb8f62a..8238f63 100644
--- a/llvm/lib/VMCore/Function.cpp
+++ b/llvm/lib/VMCore/Function.cpp
@@ -39,6 +39,8 @@
// Argument Implementation
//===----------------------------------------------------------------------===//
+void Argument::anchor() { }
+
Argument::Argument(Type *Ty, const Twine &Name, Function *Par)
: Value(Ty, Value::ArgumentVal) {
Parent = 0;
diff --git a/llvm/lib/VMCore/LLVMContextImpl.cpp b/llvm/lib/VMCore/LLVMContextImpl.cpp
index 252b340..b0dd680 100644
--- a/llvm/lib/VMCore/LLVMContextImpl.cpp
+++ b/llvm/lib/VMCore/LLVMContextImpl.cpp
@@ -93,3 +93,24 @@
// Destroy MDStrings.
DeleteContainerSeconds(MDStringCache);
}
+
+// ConstantsContext anchors
+void UnaryConstantExpr::anchor() { }
+
+void BinaryConstantExpr::anchor() { }
+
+void SelectConstantExpr::anchor() { }
+
+void ExtractElementConstantExpr::anchor() { }
+
+void InsertElementConstantExpr::anchor() { }
+
+void ShuffleVectorConstantExpr::anchor() { }
+
+void ExtractValueConstantExpr::anchor() { }
+
+void InsertValueConstantExpr::anchor() { }
+
+void GetElementPtrConstantExpr::anchor() { }
+
+void CompareConstantExpr::anchor() { }
diff --git a/llvm/lib/VMCore/Metadata.cpp b/llvm/lib/VMCore/Metadata.cpp
index 8debd7c..9966433 100644
--- a/llvm/lib/VMCore/Metadata.cpp
+++ b/llvm/lib/VMCore/Metadata.cpp
@@ -29,6 +29,8 @@
// MDString implementation.
//
+void MDString::anchor() { }
+
MDString::MDString(LLVMContext &C, StringRef S)
: Value(Type::getMetadataTy(C), Value::MDStringVal), Str(S) {}
diff --git a/llvm/lib/VMCore/PassManager.cpp b/llvm/lib/VMCore/PassManager.cpp
index 1aaf765..88c4186 100644
--- a/llvm/lib/VMCore/PassManager.cpp
+++ b/llvm/lib/VMCore/PassManager.cpp
@@ -223,6 +223,7 @@
class FunctionPassManagerImpl : public Pass,
public PMDataManager,
public PMTopLevelManager {
+ virtual void anchor();
private:
bool wasRun;
public:
@@ -291,6 +292,8 @@
}
};
+void FunctionPassManagerImpl::anchor() {}
+
char FunctionPassManagerImpl::ID = 0;
//===----------------------------------------------------------------------===//
@@ -384,6 +387,7 @@
class PassManagerImpl : public Pass,
public PMDataManager,
public PMTopLevelManager {
+ virtual void anchor();
public:
static char ID;
@@ -437,6 +441,8 @@
}
};
+void PassManagerImpl::anchor() {}
+
char PassManagerImpl::ID = 0;
} // End of llvm namespace