commit a486cb972f5b45311c4fb03d8cc6f91c23fcfb97
author Eli Friedman <eli.friedman@gmail.com> Mon Sep 26 23:15:09 2011 +0000
committer Eli Friedman <eli.friedman@gmail.com> Mon Sep 26 23:15:09 2011 +0000
tree 7260e67de2c81f3f1e7bd60cfba294fe54d35974
parent b1a9f654875f85dd24f7e3cf3d4e6f05d859a61b

Convert a bunch more tests over to the new atomic instructions.

llvm-svn: 140582

llvm/test/CodeGen/X86/atomic-or.ll

diff --git a/llvm/test/CodeGen/X86/atomic-or.ll b/llvm/test/CodeGen/X86/atomic-or.ll
index 164252d..3f02eaf 100644
--- a/llvm/test/CodeGen/X86/atomic-or.ll
+++ b/llvm/test/CodeGen/X86/atomic-or.ll
@@ -7,13 +7,11 @@
   %p.addr = alloca i64*, align 8
   store i64* %p, i64** %p.addr, align 8
   %tmp = load i64** %p.addr, align 8
-  call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
 ; CHECK: t1:
 ; CHECK: movl    $2147483648, %eax
 ; CHECK: lock
 ; CHECK-NEXT: orq %r{{.*}}, (%r{{.*}})
-  %0 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %tmp, i64 2147483648)
-  call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
+  %0 = atomicrmw or i64* %tmp, i64 2147483648 seq_cst
   ret void
 }
 
@@ -22,15 +20,9 @@
   %p.addr = alloca i64*, align 8
   store i64* %p, i64** %p.addr, align 8
   %tmp = load i64** %p.addr, align 8
-  call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
 ; CHECK: t2:
-; CHECK-NOT: movl
 ; CHECK: lock
 ; CHECK-NEXT: orq $2147483644, (%r{{.*}})
-  %0 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %tmp, i64 2147483644)
-  call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
+  %0 = atomicrmw or i64* %tmp, i64 2147483644 seq_cst
   ret void
 }
-
-declare i64 @llvm.atomic.load.or.i64.p0i64(i64* nocapture, i64) nounwind
-declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind