Change v64 datalayout in SPU.
The SPU ABI does not mention v64, and all examples
in C suggest v128 are treated similarily to arrays,
we use array alignment for v64 too. This makes the
alignment of e.g. [2 x <2 x i32>] behave "intuitively"
and similar to as if the elements were e.g. i32s.
This also makes an "unaligned store" test to be
aligned, with different (but functionally equivalent)
code generated.
llvm-svn: 117360
diff --git a/llvm/lib/Target/CellSPU/SPUSubtarget.h b/llvm/lib/Target/CellSPU/SPUSubtarget.h
index 88201c6..147163d 100644
--- a/llvm/lib/Target/CellSPU/SPUSubtarget.h
+++ b/llvm/lib/Target/CellSPU/SPUSubtarget.h
@@ -81,7 +81,7 @@
/// properties of this subtarget.
const char *getTargetDataString() const {
return "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128"
- "-i16:16:128-i8:8:128-i1:8:128-a:0:128-v64:128:128-v128:128:128"
+ "-i16:16:128-i8:8:128-i1:8:128-a:0:128-v64:64:128-v128:128:128"
"-s:128:128-n32:64";
}
};
diff --git a/llvm/test/CodeGen/CellSPU/v2f32.ll b/llvm/test/CodeGen/CellSPU/v2f32.ll
index b81c0cd..efd0320 100644
--- a/llvm/test/CodeGen/CellSPU/v2f32.ll
+++ b/llvm/test/CodeGen/CellSPU/v2f32.ll
@@ -62,8 +62,7 @@
}
define void @test_unaligned_store() {
-;CHECK: cdd $3, 8($3)
-;CHECK: lqd
+;CHECK: cdd
;CHECK: shufb
;CHECK: stqd
%data = alloca [4 x float], align 16 ; <[4 x float]*> [#uses=1]
diff --git a/llvm/test/CodeGen/CellSPU/v2i32.ll b/llvm/test/CodeGen/CellSPU/v2i32.ll
index 8cfc490..71d4aba 100644
--- a/llvm/test/CodeGen/CellSPU/v2i32.ll
+++ b/llvm/test/CodeGen/CellSPU/v2i32.ll
@@ -61,3 +61,17 @@
store %vec %val, %vec* %ptr
ret void
}
+
+;Alignment of <2 x i32> is not *directly* defined in the ABI
+;It probably is safe to interpret it as an array, thus having 8 byte
+;alignment (according to ABI). This tests that the size of
+;[2 x <2 x i32>] is 16 bytes, i.e. there is no padding between the
+;two arrays
+define <2 x i32>* @test_alignment( [2 x <2 x i32>]* %ptr)
+{
+; CHECK-NOT: ai $3, $3, 16
+; CHECK: ai $3, $3, 8
+; CHECK: bi $lr
+ %rv = getelementptr [2 x <2 x i32>]* %ptr, i32 0, i32 1
+ ret <2 x i32>* %rv
+}