rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
llvm-svn: 45667
diff --git a/llvm/lib/Target/Alpha/AlphaInstrFormats.td b/llvm/lib/Target/Alpha/AlphaInstrFormats.td
index 2df4ebc..366aea83 100644
--- a/llvm/lib/Target/Alpha/AlphaInstrFormats.td
+++ b/llvm/lib/Target/Alpha/AlphaInstrFormats.td
@@ -41,7 +41,7 @@
class MForm<bits<6> opcode, bit load, string asmstr, list<dag> pattern, InstrItinClass itin>
: InstAlpha<opcode, asmstr, itin> {
let Pattern = pattern;
- let isLoad = load;
+ let isSimpleLoad = load;
let Defs = [R28]; //We may use this for frame index calculations, so reserve it here
bits<5> Ra;