commit a5bd2954e24be344f66fe1a019ee91cac14fced9
author Krzysztof Parzyszek <kparzysz@codeaurora.org> Mon May 16 18:02:28 2016 +0000
committer Krzysztof Parzyszek <kparzysz@codeaurora.org> Mon May 16 18:02:28 2016 +0000
tree e02c5ebde102d53583f12b122063d32e026912cd
parent 429e1f9b1d74473024447eab84c451b59302425d

[Hexagon] Make getCallerSavedRegs specific to a register class

llvm-svn: 269674

llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp

diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
index d91b79d..4d6235a 100644
--- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
@@ -125,7 +125,7 @@
 static cl::opt<bool> DisableDeallocRet("disable-hexagon-dealloc-ret",
     cl::Hidden, cl::desc("Disable Dealloc Return for Hexagon target"));
 
-static cl::opt<int> NumberScavengerSlots("number-scavenger-slots",
+static cl::opt<unsigned> NumberScavengerSlots("number-scavenger-slots",
     cl::Hidden, cl::desc("Set the number of scavenger slots"), cl::init(2),
     cl::ZeroOrMore);
 
@@ -1121,11 +1121,10 @@
   HMFI.setStackAlignBasePhysReg(AP);
 }
 
-/// Returns true if there is no caller saved registers available.
+/// Returns true if there are no caller-saved registers available in class RC.
 static bool needToReserveScavengingSpillSlots(MachineFunction &MF,
-                                              const HexagonRegisterInfo &HRI) {
+      const HexagonRegisterInfo &HRI, const TargetRegisterClass *RC) {
   MachineRegisterInfo &MRI = MF.getRegInfo();
-  BitVector Reserved = HRI.getReservedRegs(MF);
 
   auto IsUsed = [&HRI,&MRI] (unsigned Reg) -> bool {
     for (MCRegAliasIterator AI(Reg, &HRI, true); AI.isValid(); ++AI)
@@ -1136,7 +1135,7 @@
 
   // Check for an unused caller-saved register. Callee-saved registers
   // have become pristine by now.
-  for (const MCPhysReg *P = HRI.getCallerSavedRegs(&MF); *P; ++P)
+  for (const MCPhysReg *P = HRI.getCallerSavedRegs(&MF, RC); *P; ++P)
     if (!IsUsed(*P))
       return false;
 
@@ -1717,27 +1716,27 @@
 
   // We need to reserve a a spill slot if scavenging could potentially require
   // spilling a scavenged register.
-  if (!NewRegs.empty() && needToReserveScavengingSpillSlots(MF, HRI)) {
+  if (!NewRegs.empty()) {
+    MachineFrameInfo &MFI = *MF.getFrameInfo();
     MachineRegisterInfo &MRI = MF.getRegInfo();
     SetVector<const TargetRegisterClass*> SpillRCs;
+    // Reserve an int register in any case, because it could be used to hold
+    // the stack offset in case it does not fit into a spill instruction.
+    SpillRCs.insert(&Hexagon::IntRegsRegClass);
+
     for (unsigned VR : NewRegs)
       SpillRCs.insert(MRI.getRegClass(VR));
 
-    MachineFrameInfo &MFI = *MF.getFrameInfo();
-    const TargetRegisterClass &IntRC = Hexagon::IntRegsRegClass;
-    if (SpillRCs.count(&IntRC)) {
-      for (int i = 0; i < NumberScavengerSlots; i++) {
-        int NewFI = MFI.CreateSpillStackObject(IntRC.getSize(),
-                                               IntRC.getAlignment());
+    for (auto *RC : SpillRCs) {
+      if (!needToReserveScavengingSpillSlots(MF, HRI, RC))
+        continue;
+      unsigned Num = RC == &Hexagon::IntRegsRegClass ? NumberScavengerSlots : 1;
+      unsigned S = RC->getSize(), A = RC->getAlignment();
+      for (unsigned i = 0; i < Num; i++) {
+        int NewFI = MFI.CreateSpillStackObject(S, A);
         RS->addScavengingFrameIndex(NewFI);
       }
     }
-    for (auto *RC : SpillRCs) {
-      if (RC == &IntRC)
-        continue;
-      int NewFI = MFI.CreateSpillStackObject(RC->getSize(), RC->getAlignment());
-      RS->addScavengingFrameIndex(NewFI);
-    }
   }
 
   TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);