commit a72fad980cb18a09dbd6ea95d3b5684d3280894a
author Krzysztof Parzyszek <kparzysz@codeaurora.org> Fri Feb 10 15:33:13 2017 +0000
committer Krzysztof Parzyszek <kparzysz@codeaurora.org> Fri Feb 10 15:33:13 2017 +0000
tree 219cb68ed6c0c45535e018f095ebb3082fea6117
parent be99157127994212eba77f268d508526fed177fd

[Hexagon] Replace instruction definitions with auto-generated ones

llvm-svn: 294753

llvm/test/CodeGen/Hexagon/tls_pic.ll

diff --git a/llvm/test/CodeGen/Hexagon/tls_pic.ll b/llvm/test/CodeGen/Hexagon/tls_pic.ll
index 190e1d7..2c2be0d 100644
--- a/llvm/test/CodeGen/Hexagon/tls_pic.ll
+++ b/llvm/test/CodeGen/Hexagon/tls_pic.ll
@@ -4,7 +4,7 @@
 @src_ie = thread_local(initialexec) global i32 0, align 4
 
 ; CHECK-LABEL:    test_initial_exec
-; CHECK-DAG:      = add(pc, ##_GLOBAL_OFFSET_TABLE_@PCREL)
+; CHECK-DAG:      = add(pc,##_GLOBAL_OFFSET_TABLE_@PCREL)
 ; CHECK-DAG:      = ##src_ie@IEGOT
 ; CHECK-DAG:      = ##dst_ie@IEGOT
 ; CHECK-NOT:  call
@@ -22,7 +22,7 @@
 ; general-dynamic model.
 
 ; CHECK-LABEL: test_dynamic
-; CHECK-DAG:   = add(pc, ##_GLOBAL_OFFSET_TABLE_@PCREL)
+; CHECK-DAG:   = add(pc,##_GLOBAL_OFFSET_TABLE_@PCREL)
 ; CHECK-DAG:   = ##src_gd@GDGOT
 ; CHECK-DAG:   = ##dst_gd@GDGOT
 ; CHECK-DAG:   call src_gd@GDPLT