CellSPU: Custom lower truncating stores of i8 to i1 (should not have been
promote), fix signed conversion of indexed offsets.
llvm-svn: 59707
diff --git a/llvm/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp b/llvm/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
index 2fdac33..3037ba3 100644
--- a/llvm/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
+++ b/llvm/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
@@ -189,9 +189,10 @@
assert(MO.isImm() &&
"printMemRegImmS10 first operand is not immedate");
int64_t value = int64_t(MI->getOperand(OpNo).getImm());
- assert((value >= -(1 << (9+4)) && value <= (1 << (9+4)) - 1)
+ int16_t value16 = int16_t(value);
+ assert((value16 >= -(1 << (9+4)) && value16 <= (1 << (9+4)) - 1)
&& "Invalid dform s10 offset argument");
- O << value << "(";
+ O << value16 << "(";
printOperand(MI, OpNo+1);
O << ")";
}