commit a79ac14fa68297f9888bc70a10df5ed9b8864e38
author David Blaikie <dblaikie@gmail.com> Fri Feb 27 21:17:42 2015 +0000
committer David Blaikie <dblaikie@gmail.com> Fri Feb 27 21:17:42 2015 +0000
tree 8d8217a8928e3ee599bdde405e2e178b3a55b645
parent 83687fb9e654c9d0086e7f6b728c26fa0b729e71

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

llvm-svn: 230794

llvm/test/CodeGen/AArch64/bitfield-insert.ll

diff --git a/llvm/test/CodeGen/AArch64/bitfield-insert.ll b/llvm/test/CodeGen/AArch64/bitfield-insert.ll
index 2369a55..9b731fa 100644
--- a/llvm/test/CodeGen/AArch64/bitfield-insert.ll
+++ b/llvm/test/CodeGen/AArch64/bitfield-insert.ll
@@ -28,10 +28,10 @@
 
 ; CHECK: bfi {{w[0-9]+}}, {{w[0-9]+}}, #26, #5
 
-  %oldval = load volatile i32* %existing
+  %oldval = load volatile i32, i32* %existing
   %oldval_keep = and i32 %oldval, 2214592511 ; =0x83ffffff
 
-  %newval = load volatile i32* %new
+  %newval = load volatile i32, i32* %new
   %newval_shifted = shl i32 %newval, 26
   %newval_masked = and i32 %newval_shifted, 2080374784 ; = 0x7c000000
 
@@ -47,10 +47,10 @@
 ; CHECK-NOT: and
 ; CHECK: ret
 
-  %oldval = load volatile i64* %existing
+  %oldval = load volatile i64, i64* %existing
   %oldval_keep = and i64 %oldval, 18446742974265032703 ; = 0xffffff0003ffffffL
 
-  %newval = load volatile i64* %new
+  %newval = load volatile i64, i64* %new
   %newval_shifted = shl i64 %newval, 26
   %newval_masked = and i64 %newval_shifted, 1099444518912 ; = 0xfffc000000
 
@@ -68,10 +68,10 @@
 
 ; CHECK: ret
 
-  %oldval = load volatile i64* %existing
+  %oldval = load volatile i64, i64* %existing
   %oldval_keep = and i64 %oldval, 4294901760 ; = 0xffff0000
 
-  %newval = load volatile i64* %new
+  %newval = load volatile i64, i64* %new
   %newval_masked = and i64 %newval, 65535 ; = 0xffff
 
   %combined = or i64 %oldval_keep, %newval_masked
@@ -86,10 +86,10 @@
 ; CHECK: and
 ; CHECK: bfi [[INSERT:w[0-9]+]], {{w[0-9]+}}, #3, #4
 
-  %oldval = load volatile i32* %existing
+  %oldval = load volatile i32, i32* %existing
   %oldval_keep = and i32 %oldval, 135 ; = 0x87
 
-  %newval = load volatile i32* %new
+  %newval = load volatile i32, i32* %new
   %newval_shifted = shl i32 %newval, 3
   %newval_masked = and i32 %newval_shifted, 120 ; = 0x78
 
@@ -104,10 +104,10 @@
 ; CHECK: and
 ; CHECK: bfi [[INSERT:x[0-9]+]], {{x[0-9]+}}, #40, #8
 
-  %oldval = load volatile i64* %existing
+  %oldval = load volatile i64, i64* %existing
   %oldval_keep = and i64 %oldval, 1095216660480 ; = 0xff_0000_0000
 
-  %newval = load volatile i64* %new
+  %newval = load volatile i64, i64* %new
   %newval_shifted = shl i64 %newval, 40
   %newval_masked = and i64 %newval_shifted, 280375465082880 ; = 0xff00_0000_0000
 
@@ -124,10 +124,10 @@
 ; CHECK: and
 ; CHECK: bfi {{w[0-9]+}}, {{w[0-9]+}}, #3, #4
 
-  %oldval = load volatile i32* %existing
+  %oldval = load volatile i32, i32* %existing
   %oldval_keep = and i32 %oldval, 647 ; = 0x287
 
-  %newval = load volatile i32* %new
+  %newval = load volatile i32, i32* %new
   %newval_shifted = shl i32 %newval, 3
   %newval_masked = and i32 %newval_shifted, 120 ; = 0x278
 
@@ -144,10 +144,10 @@
 ; CHECK-NOT: bfm
 ; CHECK: ret
 
-  %oldval = load volatile i32* %existing
+  %oldval = load volatile i32, i32* %existing
   %oldval_keep = and i32 %oldval, 135 ; = 0x87
 
-  %newval = load volatile i32* %new
+  %newval = load volatile i32, i32* %new
   %newval_shifted = shl i32 %newval, 3
   %newval_masked = and i32 %newval_shifted, 632 ; = 0x278
 
@@ -164,10 +164,10 @@
 ; CHECK-NOT: bfm
 ; CHECK: ret
 
-  %oldval = load volatile i64* %existing
+  %oldval = load volatile i64, i64* %existing
   %oldval_keep = and i64 %oldval, 135 ; = 0x87
 
-  %newval = load volatile i64* %new
+  %newval = load volatile i64, i64* %new
   %newval_shifted = shl i64 %newval, 3
   %newval_masked = and i64 %newval_shifted, 664 ; = 0x278
 
@@ -182,10 +182,10 @@
 define void @test_32bit_with_shr(i32* %existing, i32* %new) {
 ; CHECK-LABEL: test_32bit_with_shr:
 
-  %oldval = load volatile i32* %existing
+  %oldval = load volatile i32, i32* %existing
   %oldval_keep = and i32 %oldval, 2214592511 ; =0x83ffffff
 
-  %newval = load i32* %new
+  %newval = load i32, i32* %new
   %newval_shifted = shl i32 %newval, 12
   %newval_masked = and i32 %newval_shifted, 2080374784 ; = 0x7c000000