[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
diff --git a/llvm/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll b/llvm/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll
index a656c49..e277b4c 100644
--- a/llvm/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll
+++ b/llvm/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll
@@ -13,17 +13,17 @@
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
store <4 x i32> %v, <4 x i32>* %v_addr
store i32 %f, i32* %f_addr
- %1 = load <4 x i32>* %v_addr, align 16 ; <<4 x i32>> [#uses=1]
- %2 = load i32* %f_addr, align 4 ; <i32> [#uses=1]
+ %1 = load <4 x i32>, <4 x i32>* %v_addr, align 16 ; <<4 x i32>> [#uses=1]
+ %2 = load i32, i32* %f_addr, align 4 ; <i32> [#uses=1]
%3 = insertelement <4 x i32> undef, i32 %2, i32 0 ; <<4 x i32>> [#uses=1]
%4 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>> [#uses=1]
%5 = mul <4 x i32> %1, %4 ; <<4 x i32>> [#uses=1]
store <4 x i32> %5, <4 x i32>* %0, align 16
- %6 = load <4 x i32>* %0, align 16 ; <<4 x i32>> [#uses=1]
+ %6 = load <4 x i32>, <4 x i32>* %0, align 16 ; <<4 x i32>> [#uses=1]
store <4 x i32> %6, <4 x i32>* %retval, align 16
br label %return
return: ; preds = %entry
- %retval1 = load <4 x i32>* %retval ; <<4 x i32>> [#uses=1]
+ %retval1 = load <4 x i32>, <4 x i32>* %retval ; <<4 x i32>> [#uses=1]
ret <4 x i32> %retval1
}