[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
diff --git a/llvm/test/CodeGen/Mips/micromips-load-effective-address.ll b/llvm/test/CodeGen/Mips/micromips-load-effective-address.ll
index afba760..4704580 100644
--- a/llvm/test/CodeGen/Mips/micromips-load-effective-address.ll
+++ b/llvm/test/CodeGen/Mips/micromips-load-effective-address.ll
@@ -7,10 +7,10 @@
%y.addr = alloca i32*, align 8
store i32* %x, i32** %x.addr, align 8
store i32* %y, i32** %y.addr, align 8
- %0 = load i32** %x.addr, align 8
- %1 = load i32* %0, align 4
- %2 = load i32** %y.addr, align 8
- %3 = load i32* %2, align 4
+ %0 = load i32*, i32** %x.addr, align 8
+ %1 = load i32, i32* %0, align 4
+ %2 = load i32*, i32** %y.addr, align 8
+ %3 = load i32, i32* %2, align 4
%add = add nsw i32 %1, %3
ret i32 %add
}