[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
diff --git a/llvm/test/DebugInfo/X86/vla.ll b/llvm/test/DebugInfo/X86/vla.ll
index 98a3a1c..d73e0c4 100644
--- a/llvm/test/DebugInfo/X86/vla.ll
+++ b/llvm/test/DebugInfo/X86/vla.ll
@@ -28,7 +28,7 @@
%cleanup.dest.slot = alloca i32
store i32 %n, i32* %n.addr, align 4
call void @llvm.dbg.declare(metadata i32* %n.addr, metadata !15, metadata !{!"0x102"}), !dbg !16
- %0 = load i32* %n.addr, align 4, !dbg !17
+ %0 = load i32, i32* %n.addr, align 4, !dbg !17
%1 = zext i32 %0 to i64, !dbg !17
%2 = call i8* @llvm.stacksave(), !dbg !17
store i8* %2, i8** %saved_stack, !dbg !17
@@ -36,13 +36,13 @@
call void @llvm.dbg.declare(metadata i32* %vla, metadata !18, metadata !{!"0x102\006"}), !dbg !17
%arrayidx = getelementptr inbounds i32, i32* %vla, i64 0, !dbg !22
store i32 42, i32* %arrayidx, align 4, !dbg !22
- %3 = load i32* %n.addr, align 4, !dbg !23
+ %3 = load i32, i32* %n.addr, align 4, !dbg !23
%sub = sub nsw i32 %3, 1, !dbg !23
%idxprom = sext i32 %sub to i64, !dbg !23
%arrayidx1 = getelementptr inbounds i32, i32* %vla, i64 %idxprom, !dbg !23
- %4 = load i32* %arrayidx1, align 4, !dbg !23
+ %4 = load i32, i32* %arrayidx1, align 4, !dbg !23
store i32 1, i32* %cleanup.dest.slot
- %5 = load i8** %saved_stack, !dbg !24
+ %5 = load i8*, i8** %saved_stack, !dbg !24
call void @llvm.stackrestore(i8* %5), !dbg !24
ret i32 %4, !dbg !23
}
@@ -67,7 +67,7 @@
call void @llvm.dbg.declare(metadata i32* %argc.addr, metadata !25, metadata !{!"0x102"}), !dbg !26
store i8** %argv, i8*** %argv.addr, align 8
call void @llvm.dbg.declare(metadata i8*** %argv.addr, metadata !27, metadata !{!"0x102"}), !dbg !26
- %0 = load i32* %argc.addr, align 4, !dbg !28
+ %0 = load i32, i32* %argc.addr, align 4, !dbg !28
%call = call i32 @vla(i32 %0), !dbg !28
ret i32 %call, !dbg !28
}