[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
diff --git a/llvm/test/DebugInfo/cu-range-hole.ll b/llvm/test/DebugInfo/cu-range-hole.ll
index aa489b6..454c235 100644
--- a/llvm/test/DebugInfo/cu-range-hole.ll
+++ b/llvm/test/DebugInfo/cu-range-hole.ll
@@ -19,7 +19,7 @@
%c.addr = alloca i32, align 4
store i32 %c, i32* %c.addr, align 4
call void @llvm.dbg.declare(metadata i32* %c.addr, metadata !13, metadata !{!"0x102"}), !dbg !14
- %0 = load i32* %c.addr, align 4, !dbg !14
+ %0 = load i32, i32* %c.addr, align 4, !dbg !14
%add = add nsw i32 %0, 1, !dbg !14
ret i32 %add, !dbg !14
}
@@ -29,7 +29,7 @@
entry:
%b.addr = alloca i32, align 4
store i32 %b, i32* %b.addr, align 4
- %0 = load i32* %b.addr, align 4
+ %0 = load i32, i32* %b.addr, align 4
%add = add nsw i32 %0, 1
ret i32 %add
}
@@ -43,7 +43,7 @@
%e.addr = alloca i32, align 4
store i32 %e, i32* %e.addr, align 4
call void @llvm.dbg.declare(metadata i32* %e.addr, metadata !15, metadata !{!"0x102"}), !dbg !16
- %0 = load i32* %e.addr, align 4, !dbg !16
+ %0 = load i32, i32* %e.addr, align 4, !dbg !16
%add = add nsw i32 %0, 1, !dbg !16
ret i32 %add, !dbg !16
}