[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
diff --git a/llvm/test/DebugInfo/inline-scopes.ll b/llvm/test/DebugInfo/inline-scopes.ll
index ec36a2f..76e6312 100644
--- a/llvm/test/DebugInfo/inline-scopes.ll
+++ b/llvm/test/DebugInfo/inline-scopes.ll
@@ -47,7 +47,7 @@
%call.i = call zeroext i1 @_Z1fv(), !dbg !19
%frombool.i = zext i1 %call.i to i8, !dbg !19
store i8 %frombool.i, i8* %b.i, align 1, !dbg !19
- %0 = load i8* %b.i, align 1, !dbg !19
+ %0 = load i8, i8* %b.i, align 1, !dbg !19
%tobool.i = trunc i8 %0 to i1, !dbg !19
br i1 %tobool.i, label %if.then.i, label %if.end.i, !dbg !19
@@ -60,12 +60,12 @@
br label %_Z2f1v.exit, !dbg !22
_Z2f1v.exit: ; preds = %if.then.i, %if.end.i
- %1 = load i32* %retval.i, !dbg !23
+ %1 = load i32, i32* %retval.i, !dbg !23
call void @llvm.dbg.declare(metadata i8* %b.i3, metadata !24, metadata !{!"0x102"}), !dbg !27
%call.i4 = call zeroext i1 @_Z1fv(), !dbg !27
%frombool.i5 = zext i1 %call.i4 to i8, !dbg !27
store i8 %frombool.i5, i8* %b.i3, align 1, !dbg !27
- %2 = load i8* %b.i3, align 1, !dbg !27
+ %2 = load i8, i8* %b.i3, align 1, !dbg !27
%tobool.i6 = trunc i8 %2 to i1, !dbg !27
br i1 %tobool.i6, label %if.then.i7, label %if.end.i8, !dbg !27
@@ -78,7 +78,7 @@
br label %_Z2f2v.exit, !dbg !30
_Z2f2v.exit: ; preds = %if.then.i7, %if.end.i8
- %3 = load i32* %retval.i2, !dbg !31
+ %3 = load i32, i32* %retval.i2, !dbg !31
ret i32 0, !dbg !32
}