[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
diff --git a/llvm/test/Transforms/LoopUnswitch/2008-06-17-DomFrontier.ll b/llvm/test/Transforms/LoopUnswitch/2008-06-17-DomFrontier.ll
index f74054a..d606ea9 100644
--- a/llvm/test/Transforms/LoopUnswitch/2008-06-17-DomFrontier.ll
+++ b/llvm/test/Transforms/LoopUnswitch/2008-06-17-DomFrontier.ll
@@ -17,6 +17,6 @@
store i16 0, i16* @g_56, align 2
br i1 false, label %bb44, label %bb3
bb44: ; preds = %bb44, %bb36
- %tmp46 = load i16* @g_56, align 2 ; <i16> [#uses=0]
+ %tmp46 = load i16, i16* @g_56, align 2 ; <i16> [#uses=0]
br i1 false, label %bb, label %bb44
}
diff --git a/llvm/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll b/llvm/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll
index a976d18..3b89fa9 100644
--- a/llvm/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll
+++ b/llvm/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll
@@ -7,7 +7,7 @@
br i1 true, label %for.end12, label %bb.nph
bb.nph: ; preds = %entry
- %g_38.promoted = load i32* @g_38
+ %g_38.promoted = load i32, i32* @g_38
br label %for.body
for.body: ; preds = %for.cond, %bb.nph
diff --git a/llvm/test/Transforms/LoopUnswitch/2011-09-26-EHCrash.ll b/llvm/test/Transforms/LoopUnswitch/2011-09-26-EHCrash.ll
index 5717dd8..0b7f91f 100644
--- a/llvm/test/Transforms/LoopUnswitch/2011-09-26-EHCrash.ll
+++ b/llvm/test/Transforms/LoopUnswitch/2011-09-26-EHCrash.ll
@@ -24,7 +24,7 @@
%idxprom = sext i32 %inc1 to i64
%array_ = getelementptr inbounds %class.MyContainer.1.3.19.29, %class.MyContainer.1.3.19.29* %this, i32 0, i32 0
%arrayidx = getelementptr inbounds [6 x %class.MyMemVarClass.0.2.18.28*], [6 x %class.MyMemVarClass.0.2.18.28*]* %array_, i32 0, i64 %idxprom
- %tmp4 = load %class.MyMemVarClass.0.2.18.28** %arrayidx, align 8
+ %tmp4 = load %class.MyMemVarClass.0.2.18.28*, %class.MyMemVarClass.0.2.18.28** %arrayidx, align 8
%isnull = icmp eq %class.MyMemVarClass.0.2.18.28* %tmp4, null
br i1 %isnull, label %for.inc, label %delete.notnull
diff --git a/llvm/test/Transforms/LoopUnswitch/2011-11-18-SimpleSwitch.ll b/llvm/test/Transforms/LoopUnswitch/2011-11-18-SimpleSwitch.ll
index a8608b8..a35596a 100644
--- a/llvm/test/Transforms/LoopUnswitch/2011-11-18-SimpleSwitch.ll
+++ b/llvm/test/Transforms/LoopUnswitch/2011-11-18-SimpleSwitch.ll
@@ -15,7 +15,7 @@
; CHECK-NEXT: br label %loop_begin.us
; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us
-; CHECK-NEXT: %var_val.us = load i32* %var
+; CHECK-NEXT: %var_val.us = load i32, i32* %var
; CHECK-NEXT: switch i32 1, label %default.us-lcssa.us [
; CHECK-NEXT: i32 1, label %inc.us
@@ -34,7 +34,7 @@
; CHECK-NEXT: br label %loop_begin.us1
; CHECK: loop_begin.us1: ; preds = %loop_begin.backedge.us5, %.split.split.us
-; CHECK-NEXT: %var_val.us2 = load i32* %var
+; CHECK-NEXT: %var_val.us2 = load i32, i32* %var
; CHECK-NEXT: switch i32 2, label %default.us-lcssa.us-lcssa.us [
; CHECK-NEXT: i32 1, label %inc.us4
; CHECK-NEXT: i32 2, label %dec.us3
@@ -48,7 +48,7 @@
; CHECK-NEXT: br label %loop_begin
; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split.split
-; CHECK-NEXT: %var_val = load i32* %var
+; CHECK-NEXT: %var_val = load i32, i32* %var
; CHECK-NEXT: switch i32 %c, label %default.us-lcssa.us-lcssa [
; CHECK-NEXT: i32 1, label %inc
; CHECK-NEXT: i32 2, label %dec
@@ -63,13 +63,13 @@
define i32 @test(i32* %var) {
%mem = alloca i32
store i32 2, i32* %mem
- %c = load i32* %mem
+ %c = load i32, i32* %mem
br label %loop_begin
loop_begin:
- %var_val = load i32* %var
+ %var_val = load i32, i32* %var
switch i32 %c, label %default [
i32 1, label %inc
diff --git a/llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches-Threshold.ll b/llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches-Threshold.ll
index 686cedb..393dd5c 100644
--- a/llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches-Threshold.ll
+++ b/llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches-Threshold.ll
@@ -52,14 +52,14 @@
define i32 @test(i32* %var) {
%mem = alloca i32
store i32 2, i32* %mem
- %c = load i32* %mem
- %d = load i32* %mem
+ %c = load i32, i32* %mem
+ %d = load i32, i32* %mem
br label %loop_begin
loop_begin:
- %var_val = load i32* %var
+ %var_val = load i32, i32* %var
switch i32 %c, label %second_switch [
i32 1, label %inc
diff --git a/llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches.ll b/llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches.ll
index 3ba9fc2..20f03c9 100644
--- a/llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches.ll
+++ b/llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches.ll
@@ -22,7 +22,7 @@
; CHECK-NEXT: br label %loop_begin.us.us
; CHECK: loop_begin.us.us: ; preds = %loop_begin.backedge.us.us, %.split.us.split.us
-; CHECK-NEXT: %var_val.us.us = load i32* %var
+; CHECK-NEXT: %var_val.us.us = load i32, i32* %var
; CHECK-NEXT: switch i32 1, label %second_switch.us.us [
; CHECK-NEXT: i32 1, label %inc.us.us
@@ -38,7 +38,7 @@
; CHECK-NEXT: br label %loop_begin.us
; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us.split
-; CHECK-NEXT: %var_val.us = load i32* %var
+; CHECK-NEXT: %var_val.us = load i32, i32* %var
; CHECK-NEXT: switch i32 1, label %second_switch.us [
; CHECK-NEXT: i32 1, label %inc.us
@@ -65,7 +65,7 @@
; CHECK-NEXT: br label %loop_begin.us1
; CHECK: loop_begin.us1: ; preds = %loop_begin.backedge.us6, %.split.split.us
-; CHECK-NEXT: %var_val.us2 = load i32* %var
+; CHECK-NEXT: %var_val.us2 = load i32, i32* %var
; CHECK-NEXT: switch i32 %c, label %second_switch.us3 [
; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge.us
; CHECK-NEXT: ]
@@ -86,7 +86,7 @@
; CHECK-NEXT: br label %loop_begin
; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split.split
-; CHECK-NEXT: %var_val = load i32* %var
+; CHECK-NEXT: %var_val = load i32, i32* %var
; CHECK-NEXT: switch i32 %c, label %second_switch [
; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge
; CHECK-NEXT: ]
@@ -106,14 +106,14 @@
define i32 @test(i32* %var) {
%mem = alloca i32
store i32 2, i32* %mem
- %c = load i32* %mem
- %d = load i32* %mem
+ %c = load i32, i32* %mem
+ %d = load i32, i32* %mem
br label %loop_begin
loop_begin:
- %var_val = load i32* %var
+ %var_val = load i32, i32* %var
switch i32 %c, label %second_switch [
i32 1, label %inc
diff --git a/llvm/test/Transforms/LoopUnswitch/2012-04-30-LoopUnswitch-LPad-Crash.ll b/llvm/test/Transforms/LoopUnswitch/2012-04-30-LoopUnswitch-LPad-Crash.ll
index 80e4d78..223fbf1 100644
--- a/llvm/test/Transforms/LoopUnswitch/2012-04-30-LoopUnswitch-LPad-Crash.ll
+++ b/llvm/test/Transforms/LoopUnswitch/2012-04-30-LoopUnswitch-LPad-Crash.ll
@@ -46,9 +46,9 @@
entry:
%this.addr = alloca %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379*, align 8
store %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379* %this, %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379** %this.addr, align 8
- %this1 = load %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379** %this.addr
+ %this1 = load %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379*, %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379** %this.addr
%px = getelementptr inbounds %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379, %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379* %this1, i32 0, i32 0
- %0 = load %class.C.23.43.67.103.139.159.179.199.239.243.247.251.263.295.303.339.347.376** %px, align 8
+ %0 = load %class.C.23.43.67.103.139.159.179.199.239.243.247.251.263.295.303.339.347.376*, %class.C.23.43.67.103.139.159.179.199.239.243.247.251.263.295.303.339.347.376** %px, align 8
%tobool = icmp ne %class.C.23.43.67.103.139.159.179.199.239.243.247.251.263.295.303.339.347.376* %0, null
br i1 %tobool, label %cond.end, label %cond.false
diff --git a/llvm/test/Transforms/LoopUnswitch/2012-05-20-Phi.ll b/llvm/test/Transforms/LoopUnswitch/2012-05-20-Phi.ll
index 4c63a56..96bc28c 100644
--- a/llvm/test/Transforms/LoopUnswitch/2012-05-20-Phi.ll
+++ b/llvm/test/Transforms/LoopUnswitch/2012-05-20-Phi.ll
@@ -9,9 +9,9 @@
define void @func() noreturn nounwind uwtable {
entry:
- %0 = load i32* @a, align 4
+ %0 = load i32, i32* @a, align 4
%tobool = icmp eq i32 %0, 0
- %1 = load i32* @b, align 4
+ %1 = load i32, i32* @b, align 4
br label %while.body
while.body: ; preds = %while.body, %entry
diff --git a/llvm/test/Transforms/LoopUnswitch/basictest.ll b/llvm/test/Transforms/LoopUnswitch/basictest.ll
index 2a0f5a5..e990144 100644
--- a/llvm/test/Transforms/LoopUnswitch/basictest.ll
+++ b/llvm/test/Transforms/LoopUnswitch/basictest.ll
@@ -7,12 +7,12 @@
%i.0.0 = phi i32 [ 0, %entry ], [ %i.0.0.be, %no_exit.backedge ] ; <i32> [#uses=3]
%gep.upgrd.1 = zext i32 %i.0.0 to i64 ; <i64> [#uses=1]
%tmp.7 = getelementptr i32, i32* %A, i64 %gep.upgrd.1 ; <i32*> [#uses=4]
- %tmp.13 = load i32* %tmp.7 ; <i32> [#uses=2]
+ %tmp.13 = load i32, i32* %tmp.7 ; <i32> [#uses=2]
%tmp.14 = add i32 %tmp.13, 1 ; <i32> [#uses=1]
store i32 %tmp.14, i32* %tmp.7
br i1 %C, label %then, label %endif
then: ; preds = %no_exit
- %tmp.29 = load i32* %tmp.7 ; <i32> [#uses=1]
+ %tmp.29 = load i32, i32* %tmp.7 ; <i32> [#uses=1]
%tmp.30 = add i32 %tmp.29, 2 ; <i32> [#uses=1]
store i32 %tmp.30, i32* %tmp.7
%inc9 = add i32 %i.0.0, 1 ; <i32> [#uses=2]
@@ -36,13 +36,13 @@
define i32 @test2(i32* %var) {
%mem = alloca i32
store i32 2, i32* %mem
- %c = load i32* %mem
+ %c = load i32, i32* %mem
br label %loop_begin
loop_begin:
- %var_val = load i32* %var
+ %var_val = load i32, i32* %var
switch i32 %c, label %default [
i32 1, label %inc
diff --git a/llvm/test/Transforms/LoopUnswitch/preserve-analyses.ll b/llvm/test/Transforms/LoopUnswitch/preserve-analyses.ll
index 2725745..e3774a1 100644
--- a/llvm/test/Transforms/LoopUnswitch/preserve-analyses.ll
+++ b/llvm/test/Transforms/LoopUnswitch/preserve-analyses.ll
@@ -11,8 +11,8 @@
define i32 @ineqn(i8* %s, i8* %p) nounwind readonly {
entry:
- %0 = load i32* @delim1, align 4 ; <i32> [#uses=1]
- %1 = load i32* @delim2, align 4 ; <i32> [#uses=1]
+ %0 = load i32, i32* @delim1, align 4 ; <i32> [#uses=1]
+ %1 = load i32, i32* @delim2, align 4 ; <i32> [#uses=1]
br label %bb8.outer
bb: ; preds = %bb8
@@ -61,7 +61,7 @@
bb8: ; preds = %bb8.outer, %bb8.backedge
%p_addr.0 = phi i8* [ %p_addr.0.ph, %bb8.outer ], [ %3, %bb8.backedge ] ; <i8*> [#uses=3]
- %7 = load i8* %p_addr.0, align 1 ; <i8> [#uses=2]
+ %7 = load i8, i8* %p_addr.0, align 1 ; <i8> [#uses=2]
%8 = sext i8 %7 to i32 ; <i32> [#uses=2]
%9 = icmp eq i8 %7, 0 ; <i1> [#uses=1]
br i1 %9, label %bb10, label %bb