commit a7c82a9f1da9466ca0b5481e6ccb852a0fbba99d
author Matthias Braun <matze@braunis.de> Thu Dec 11 19:42:05 2014 +0000
committer Matthias Braun <matze@braunis.de> Thu Dec 11 19:42:05 2014 +0000
tree 7d45e944e048025936e2b6aa4acab90e69fa5665
parent a4e932db1656772da874f69ae63ab24a01038b62

[CodeGen] Add print and verify pass after each MachineFunctionPass by default

Previously print+verify passes were added in a very unsystematic way, which is
annoying when debugging as you miss intermediate steps and allows bugs to stay
unnotice when no verification is performed.

To make this change practical I added the possibility to explicitely disable
verification. I used this option on all places where no verification was
performed previously (because alot of places actually don't pass the
MachineVerifier).
In the long term these problems should be fixed properly and verification
enabled after each pass. I'll enable some more verification in subsequent
commits.

llvm-svn: 224042

llvm/lib/Target/X86/X86TargetMachine.cpp

diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 8802feb..ce18761 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -154,9 +154,8 @@
   void addIRPasses() override;
   bool addInstSelector() override;
   bool addILPOpts() override;
-  bool addPreRegAlloc() override;
-  bool addPostRegAlloc() override;
-  bool addPreEmitPass() override;
+  void addPostRegAlloc() override;
+  void addPreEmitPass() override;
 };
 } // namespace
 
@@ -188,32 +187,19 @@
   return true;
 }
 
-bool X86PassConfig::addPreRegAlloc() {
-  return false;  // -print-machineinstr shouldn't print after this.
-}
-
-bool X86PassConfig::addPostRegAlloc() {
+void X86PassConfig::addPostRegAlloc() {
   addPass(createX86FloatingPointStackifierPass());
-  return true;  // -print-machineinstr should print after this.
 }
 
-bool X86PassConfig::addPreEmitPass() {
-  bool ShouldPrint = false;
-  if (getOptLevel() != CodeGenOpt::None && getX86Subtarget().hasSSE2()) {
-    addPass(createExecutionDependencyFixPass(&X86::VR128RegClass));
-    ShouldPrint = true;
-  }
+void X86PassConfig::addPreEmitPass() {
+  if (getOptLevel() != CodeGenOpt::None && getX86Subtarget().hasSSE2())
+    addPass(createExecutionDependencyFixPass(&X86::VR128RegClass), false);
 
-  if (UseVZeroUpper) {
-    addPass(createX86IssueVZeroUpperPass());
-    ShouldPrint = true;
-  }
+  if (UseVZeroUpper)
+    addPass(createX86IssueVZeroUpperPass(), false);
 
   if (getOptLevel() != CodeGenOpt::None) {
-    addPass(createX86PadShortFunctions());
+    addPass(createX86PadShortFunctions(), false);
     addPass(createX86FixupLEAs());
-    ShouldPrint = true;
   }
-
-  return ShouldPrint;
 }