[llvm-exegesis][X86] Randomize CMOVcc/SETcc OPERAND_COND_CODE CondCodes
Reviewers: courbet, gchatelet
Reviewed By: gchatelet
Subscribers: tschuett, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60066
llvm-svn: 357898
diff --git a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
index 8cbde9f..d5c790d 100644
--- a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
+++ b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
@@ -146,15 +146,16 @@
return RandomGenerator;
}
-static size_t randomIndex(size_t Size) {
- assert(Size > 0);
- std::uniform_int_distribution<> Distribution(0, Size - 1);
+size_t randomIndex(size_t Max) {
+ std::uniform_int_distribution<> Distribution(0, Max);
return Distribution(randomGenerator());
}
template <typename C>
static auto randomElement(const C &Container) -> decltype(Container[0]) {
- return Container[randomIndex(Container.size())];
+ assert(!Container.empty() &&
+ "Can't pick a random element from an empty container)");
+ return Container[randomIndex(Container.size() - 1)];
}
static void setRegisterOperandValue(const RegisterOperandAssignment &ROV,
@@ -176,7 +177,7 @@
size_t randomBit(const llvm::BitVector &Vector) {
assert(Vector.any());
auto Itr = Vector.set_bits_begin();
- for (size_t I = randomIndex(Vector.count()); I != 0; --I)
+ for (size_t I = randomIndex(Vector.count() - 1); I != 0; --I)
++Itr;
return *Itr;
}