commit a832b22baefa6c4d7e5518bd2469add47d5605d5
author Gabor Buella <gabor.buella@intel.com> Thu May 10 07:26:05 2018 +0000
committer Gabor Buella <gabor.buella@intel.com> Thu May 10 07:26:05 2018 +0000
tree 3df19403d288ca25a9932e50f60432f8bb385cce
parent 6bbca36414e9a2249949d9a64d5f0891a4543c30

[X86] ptwrite intrinsic

Reviewers: craig.topper, RKSimon

Reviewed By: craig.topper, RKSimon

Differential Revision: https://reviews.llvm.org/D46539

llvm-svn: 331961

llvm/lib/Support/Host.cpp

diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp
index d13aa8d..9981bcc 100644
--- a/llvm/lib/Support/Host.cpp
+++ b/llvm/lib/Support/Host.cpp
@@ -1286,6 +1286,11 @@
   Features["xsavec"]   = HasLeafD && ((EAX >> 1) & 1) && HasAVXSave;
   Features["xsaves"]   = HasLeafD && ((EAX >> 3) & 1) && HasAVXSave;
 
+  bool HasLeaf14 = MaxLevel >= 0x14 &&
+                  !getX86CpuIDAndInfoEx(0x14, 0x0, &EAX, &EBX, &ECX, &EDX);
+
+  Features["ptwrite"] = HasLeaf14 && ((EBX >> 4) & 1);
+
   return true;
 }
 #elif defined(__linux__) && (defined(__arm__) || defined(__aarch64__))