commit a8653da4320c5e37fccc54d396f2286a0dce7efe
author Simon Pilgrim <llvm-dev@redking.me.uk> Mon Nov 04 17:24:18 2019 +0000
committer Simon Pilgrim <llvm-dev@redking.me.uk> Mon Nov 04 17:24:35 2019 +0000
tree 55349e83f8acb96288173528a4c63514920d079a
parent e1000f1d674186c095eac2f252d45ff5b9306db7

[X86] Fix uninitialized variable warnings. NFCI.

llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp

diff --git a/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp b/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
index b898078..9aa47c5 100644
--- a/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
+++ b/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
@@ -148,8 +148,8 @@
 
   /// Manages the predicate state traced through the program.
   struct PredState {
-    unsigned InitialReg;
-    unsigned PoisonReg;
+    unsigned InitialReg = 0;
+    unsigned PoisonReg = 0;
 
     const TargetRegisterClass *RC;
     MachineSSAUpdater SSA;
@@ -158,10 +158,10 @@
         : RC(RC), SSA(MF) {}
   };
 
-  const X86Subtarget *Subtarget;
-  MachineRegisterInfo *MRI;
-  const X86InstrInfo *TII;
-  const TargetRegisterInfo *TRI;
+  const X86Subtarget *Subtarget = nullptr;
+  MachineRegisterInfo *MRI = nullptr;
+  const X86InstrInfo *TII = nullptr;
+  const TargetRegisterInfo *TRI = nullptr;
 
   Optional<PredState> PS;