commit a8846e0540c72b3b4eb0f7d2664a65126dcd71bc
author Andrew Trick <atrick@apple.com> Wed Mar 23 20:40:18 2011 +0000
committer Andrew Trick <atrick@apple.com> Wed Mar 23 20:40:18 2011 +0000
tree 94483f8dd957de9f17ce125f8000126091e996a2
parent ac77f3b2ac7a8b6e26bd4c03f512e5b72b9b6eec

whitespace

llvm-svn: 128163

llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index ffe6b9c..aa93bba 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -1812,7 +1812,7 @@
 
   if (!SU->getNode())
     return;
-  
+
   for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
        I != E; ++I) {
     if (I->isCtrl())
@@ -1880,7 +1880,7 @@
 
   const SDNode *N = SU->getNode();
   if (!N) return;
-  
+
   if (!N->isMachineOpcode()) {
     if (N->getOpcode() != ISD::CopyToReg)
       return;