All v2f64 shuffle cases can be handled.
llvm-svn: 27044
diff --git a/llvm/lib/Target/X86/README.txt b/llvm/lib/Target/X86/README.txt
index 1c227d3..0cf645c 100644
--- a/llvm/lib/Target/X86/README.txt
+++ b/llvm/lib/Target/X86/README.txt
@@ -655,3 +655,7 @@
Obviously it would have been better for the first mov (or any op) to store
directly %esp[0] if there are no other uses.
+
+//===---------------------------------------------------------------------===//
+
+Add more vector shuffle special cases using unpckhps and unpcklps.
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 4e209e4..540fc11 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -2329,7 +2329,10 @@
return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1,
DAG.getNode(ISD::UNDEF, V1.getValueType()),
PermMask);
- } else if (NumElems == 2 || X86::isSHUFPMask(PermMask.Val)) {
+ } else if (NumElems == 2) {
+ // All v2f64 cases are handled.
+ return SDOperand();
+ } else if (X86::isSHUFPMask(PermMask.Val)) {
SDOperand Elt = PermMask.getOperand(0);
if (cast<ConstantSDNode>(Elt)->getValue() >= NumElems) {
// Swap the operands and change mask.