ARM: don't rely on push/pop reglists being in order when folding SP adjust.
It would be a very nice invariant to rely on, but unfortunately it doesn't
necessarily hold (and the causes of mis-sorted reglists appear to be quite
varied) so to be robust the frame lowering code can't assume that the first
register in the list is also the first one that actually gets pushed.
Should fix an issue where we were turning something like:
push {r8, r4, r7, lr}
sub sp, #24
into nonsense like:
push {r2, r3, r4, r5, r6, r7, r8, r4, r7, lr}
llvm-svn: 285232
diff --git a/llvm/test/CodeGen/ARM/fold-stack-adjust.ll b/llvm/test/CodeGen/ARM/fold-stack-adjust.ll
index 8944a40..442459b 100644
--- a/llvm/test/CodeGen/ARM/fold-stack-adjust.ll
+++ b/llvm/test/CodeGen/ARM/fold-stack-adjust.ll
@@ -218,4 +218,18 @@
ret float %call1
}
+declare void @use_arr(i32*)
+define void @test_fold_reuse() minsize {
+; CHECK-LABEL: test_fold_reuse:
+; CHECK: push.w {r4, r7, r8, lr}
+; CHECK: sub sp, #24
+; [...]
+; CHECK: add sp, #24
+; CHECK: pop.w {r4, r7, r8, pc}
+ %arr = alloca i8, i32 24
+ call void asm sideeffect "", "~{r8},~{r4}"()
+ call void @bar(i8* %arr)
+ ret void
+}
+
declare void @llvm.va_start(i8*) nounwind