[X86] Cleanup WriteFStore/WriteVecStore schedules
MOVNTPD/MOVNTPS should be WriteFStore
Standardized BDW/HSW/SKL/SKX WriteFStore/WriteVecStore - fixes some missed instregex patterns. (V)MASKMOVDQU was already using the default, its costs gets increased but is still nowhere near the real cost of that nasty instruction....
llvm-svn: 331864
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td
index b52ca8b..473bea5 100644
--- a/llvm/lib/Target/X86/X86InstrSSE.td
+++ b/llvm/lib/Target/X86/X86InstrSSE.td
@@ -3020,7 +3020,7 @@
} // ExeDomain, SchedRW
} // Predicates
-let SchedRW = [WriteVecStore] in {
+let SchedRW = [WriteFStore] in {
def MOVNTPSmr : PSI<0x2B, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
"movntps\t{$src, $dst|$dst, $src}",
[(alignednontemporalstore (v4f32 VR128:$src), addr:$dst)]>;
diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td
index d97efee..3fa70f1 100755
--- a/llvm/lib/Target/X86/X86SchedBroadwell.td
+++ b/llvm/lib/Target/X86/X86SchedBroadwell.td
@@ -164,7 +164,7 @@
defm : X86WriteRes<WriteFLoad, [BWPort23], 5, [1], 1>;
defm : X86WriteRes<WriteFMaskedLoad, [BWPort23,BWPort5], 7, [1,2], 3>;
defm : X86WriteRes<WriteFMaskedLoadY, [BWPort23,BWPort5], 8, [1,2], 3>;
-defm : X86WriteRes<WriteFStore, [BWPort237,BWPort4], 1, [1,1], 1>;
+defm : X86WriteRes<WriteFStore, [BWPort237,BWPort4], 1, [1,1], 2>;
defm : X86WriteRes<WriteFMaskedStore, [BWPort0,BWPort4,BWPort237,BWPort15], 5, [1,1,1,1], 4>;
defm : X86WriteRes<WriteFMaskedStoreY, [BWPort0,BWPort4,BWPort237,BWPort15], 5, [1,1,1,1], 4>;
defm : X86WriteRes<WriteFMove, [BWPort5], 1, [1], 1>;
@@ -258,7 +258,7 @@
defm : X86WriteRes<WriteVecLoad, [BWPort23], 5, [1], 1>;
defm : X86WriteRes<WriteVecMaskedLoad, [BWPort23,BWPort5], 7, [1,2], 3>;
defm : X86WriteRes<WriteVecMaskedLoadY, [BWPort23,BWPort5], 8, [1,2], 3>;
-defm : X86WriteRes<WriteVecStore, [BWPort237,BWPort4], 1, [1,1], 1>;
+defm : X86WriteRes<WriteVecStore, [BWPort237,BWPort4], 1, [1,1], 2>;
defm : X86WriteRes<WriteVecMaskedStore, [BWPort0,BWPort4,BWPort237,BWPort15], 5, [1,1,1,1], 4>;
defm : X86WriteRes<WriteVecMaskedStoreY, [BWPort0,BWPort4,BWPort237,BWPort15], 5, [1,1,1,1], 4>;
defm : X86WriteRes<WriteVecMove, [BWPort015], 1, [1], 1>;
@@ -566,26 +566,15 @@
"MOVNTI_64mr",
"MOVNTImr",
"ST_FP(32|64|80)m",
- "VEXTRACTF128mr",
- "VEXTRACTI128mr",
- "(V?)MOVAPD(Y?)mr",
- "(V?)MOVAPS(Y?)mr",
- "(V?)MOVDQA(Y?)mr",
- "(V?)MOVDQU(Y?)mr",
"(V?)MOVHPDmr",
"(V?)MOVHPSmr",
"(V?)MOVLPDmr",
"(V?)MOVLPSmr",
- "(V?)MOVNTDQ(V?)mr",
- "(V?)MOVNTPD(V?)mr",
- "(V?)MOVNTPS(V?)mr",
"(V?)MOVPDI2DImr",
"(V?)MOVPQI2QImr",
"(V?)MOVPQIto64mr",
"(V?)MOVSDmr",
- "(V?)MOVSSmr",
- "(V?)MOVUPD(Y?)mr",
- "(V?)MOVUPS(Y?)mr")>;
+ "(V?)MOVSSmr")>;
def BWWriteResGroup12 : SchedWriteRes<[BWPort01]> {
let Latency = 2;
diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td
index 5a612d1..aef283a 100644
--- a/llvm/lib/Target/X86/X86SchedHaswell.td
+++ b/llvm/lib/Target/X86/X86SchedHaswell.td
@@ -155,7 +155,7 @@
defm : X86WriteRes<WriteFLoad, [HWPort23], 5, [1], 1>;
defm : X86WriteRes<WriteFMaskedLoad, [HWPort23,HWPort5], 8, [1,2], 3>;
defm : X86WriteRes<WriteFMaskedLoadY, [HWPort23,HWPort5], 9, [1,2], 3>;
-defm : X86WriteRes<WriteFStore, [HWPort237,HWPort4], 1, [1,1], 1>;
+defm : X86WriteRes<WriteFStore, [HWPort237,HWPort4], 1, [1,1], 2>;
defm : X86WriteRes<WriteFMaskedStore, [HWPort0,HWPort4,HWPort237,HWPort15], 5, [1,1,1,1], 4>;
defm : X86WriteRes<WriteFMaskedStoreY, [HWPort0,HWPort4,HWPort237,HWPort15], 5, [1,1,1,1], 4>;
defm : X86WriteRes<WriteFMove, [HWPort5], 1, [1], 1>;
@@ -250,7 +250,7 @@
defm : X86WriteRes<WriteVecLoad, [HWPort23], 5, [1], 1>;
defm : X86WriteRes<WriteVecMaskedLoad, [HWPort23,HWPort5], 8, [1,2], 3>;
defm : X86WriteRes<WriteVecMaskedLoadY, [HWPort23,HWPort5], 9, [1,2], 3>;
-defm : X86WriteRes<WriteVecStore, [HWPort237,HWPort4], 1, [1,1], 1>;
+defm : X86WriteRes<WriteVecStore, [HWPort237,HWPort4], 1, [1,1], 2>;
defm : X86WriteRes<WriteVecMaskedStore, [HWPort0,HWPort4,HWPort237,HWPort15], 5, [1,1,1,1], 4>;
defm : X86WriteRes<WriteVecMaskedStoreY, [HWPort0,HWPort4,HWPort237,HWPort15], 5, [1,1,1,1], 4>;
defm : X86WriteRes<WriteVecMove, [HWPort015], 1, [1], 1>;
@@ -759,26 +759,15 @@
"MOVNTI_64mr",
"MOVNTImr",
"ST_FP(32|64|80)m",
- "VEXTRACTF128mr",
- "VEXTRACTI128mr",
- "(V?)MOVAPD(Y?)mr",
- "(V?)MOVAPS(V?)mr",
- "(V?)MOVDQA(Y?)mr",
- "(V?)MOVDQU(Y?)mr",
"(V?)MOVHPDmr",
"(V?)MOVHPSmr",
"(V?)MOVLPDmr",
"(V?)MOVLPSmr",
- "(V?)MOVNTDQ(Y?)mr",
- "(V?)MOVNTPD(Y?)mr",
- "(V?)MOVNTPS(Y?)mr",
"(V?)MOVPDI2DImr",
"(V?)MOVPQI2QImr",
"(V?)MOVPQIto64mr",
"(V?)MOVSDmr",
"(V?)MOVSSmr",
- "(V?)MOVUPD(Y?)mr",
- "(V?)MOVUPS(Y?)mr",
"VMPTRSTm")>;
def HWWriteResGroup2 : SchedWriteRes<[HWPort0]> {
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
index fa145d9..84b0055 100644
--- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
@@ -160,7 +160,7 @@
defm : X86WriteRes<WriteFLoad, [SKLPort23], 6, [1], 1>;
defm : X86WriteRes<WriteFMaskedLoad, [SKLPort23,SKLPort015], 7, [1,1], 2>;
defm : X86WriteRes<WriteFMaskedLoadY, [SKLPort23,SKLPort015], 8, [1,1], 2>;
-defm : X86WriteRes<WriteFStore, [SKLPort237,SKLPort4], 1, [1,1], 1>;
+defm : X86WriteRes<WriteFStore, [SKLPort237,SKLPort4], 1, [1,1], 2>;
defm : X86WriteRes<WriteFMaskedStore, [SKLPort237,SKLPort0], 2, [1,1], 2>;
defm : X86WriteRes<WriteFMaskedStoreY, [SKLPort237,SKLPort0], 2, [1,1], 2>;
defm : X86WriteRes<WriteFMove, [SKLPort015], 1, [1], 1>;
@@ -251,7 +251,7 @@
defm : X86WriteRes<WriteVecLoad, [SKLPort23], 6, [1], 1>;
defm : X86WriteRes<WriteVecMaskedLoad, [SKLPort23,SKLPort015], 7, [1,1], 2>;
defm : X86WriteRes<WriteVecMaskedLoadY, [SKLPort23,SKLPort015], 8, [1,1], 2>;
-defm : X86WriteRes<WriteVecStore, [SKLPort237,SKLPort4], 1, [1,1], 1>;
+defm : X86WriteRes<WriteVecStore, [SKLPort237,SKLPort4], 1, [1,1], 2>;
defm : X86WriteRes<WriteVecMaskedStore, [SKLPort237,SKLPort0], 2, [1,1], 2>;
defm : X86WriteRes<WriteVecMaskedStoreY, [SKLPort237,SKLPort0], 2, [1,1], 2>;
defm : X86WriteRes<WriteVecMove, [SKLPort015], 1, [1], 1>;
@@ -596,26 +596,15 @@
"MOVNTI_64mr",
"MOVNTImr",
"ST_FP(32|64|80)m",
- "VEXTRACTF128mr",
- "VEXTRACTI128mr",
- "(V?)MOVAPDYmr",
- "(V?)MOVAPS(Y?)mr",
- "(V?)MOVDQA(Y?)mr",
- "(V?)MOVDQU(Y?)mr",
"(V?)MOVHPDmr",
"(V?)MOVHPSmr",
"(V?)MOVLPDmr",
"(V?)MOVLPSmr",
- "(V?)MOVNTDQ(Y?)mr",
- "(V?)MOVNTPD(Y?)mr",
- "(V?)MOVNTPS(Y?)mr",
"(V?)MOVPDI2DImr",
"(V?)MOVPQI2QImr",
"(V?)MOVPQIto64mr",
"(V?)MOVSDmr",
"(V?)MOVSSmr",
- "(V?)MOVUPD(Y?)mr",
- "(V?)MOVUPS(Y?)mr",
"VMPTRSTm")>;
def SKLWriteResGroup12 : SchedWriteRes<[SKLPort0]> {
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
index 0699937..76755c6 100755
--- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
@@ -160,7 +160,7 @@
defm : X86WriteRes<WriteFLoad, [SKXPort23], 5, [1], 1>;
defm : X86WriteRes<WriteFMaskedLoad, [SKXPort23,SKXPort015], 7, [1,1], 2>;
defm : X86WriteRes<WriteFMaskedLoadY, [SKXPort23,SKXPort015], 8, [1,1], 2>;
-defm : X86WriteRes<WriteFStore, [SKXPort237,SKXPort4], 1, [1,1], 1>;
+defm : X86WriteRes<WriteFStore, [SKXPort237,SKXPort4], 1, [1,1], 2>;
defm : X86WriteRes<WriteFMaskedStore, [SKXPort237,SKXPort0], 2, [1,1], 2>;
defm : X86WriteRes<WriteFMaskedStoreY, [SKXPort237,SKXPort0], 2, [1,1], 2>;
defm : X86WriteRes<WriteFMove, [SKXPort015], 1, [1], 1>;
@@ -251,7 +251,7 @@
defm : X86WriteRes<WriteVecLoad, [SKXPort23], 5, [1], 1>;
defm : X86WriteRes<WriteVecMaskedLoad, [SKXPort23,SKXPort015], 7, [1,1], 2>;
defm : X86WriteRes<WriteVecMaskedLoadY, [SKXPort23,SKXPort015], 8, [1,1], 2>;
-defm : X86WriteRes<WriteVecStore, [SKXPort237,SKXPort4], 1, [1,1], 1>;
+defm : X86WriteRes<WriteVecStore, [SKXPort237,SKXPort4], 1, [1,1], 2>;
defm : X86WriteRes<WriteVecMaskedStore, [SKXPort237,SKXPort0], 2, [1,1], 2>;
defm : X86WriteRes<WriteVecMaskedStoreY, [SKXPort237,SKXPort0], 2, [1,1], 2>;
defm : X86WriteRes<WriteVecMove, [SKXPort015], 1, [1], 1>;
@@ -701,10 +701,6 @@
"MMX_MOVD64mr",
"MMX_MOVNTQmr",
"MMX_MOVQ64mr",
- "MOVAPDmr",
- "MOVAPSmr",
- "MOVDQAmr",
- "MOVDQUmr",
"MOVHPDmr",
"MOVHPSmr",
"MOVLPDmr",
@@ -712,63 +708,14 @@
"MOVNTDQmr",
"MOVNTI_64mr",
"MOVNTImr",
- "MOVNTPDmr",
- "MOVNTPSmr",
"MOVPDI2DImr",
"MOVPQI2QImr",
"MOVPQIto64mr",
"MOVSDmr",
"MOVSSmr",
- "MOVUPDmr",
- "MOVUPSmr",
"ST_FP32m",
"ST_FP64m",
"ST_FP80m",
- "VEXTRACTF128mr",
- "VEXTRACTF32x4Z256mr(b?)",
- "VEXTRACTF32x4Zmr(b?)",
- "VEXTRACTF32x8Zmr(b?)",
- "VEXTRACTF64x2Z256mr(b?)",
- "VEXTRACTF64x2Zmr(b?)",
- "VEXTRACTF64x4Zmr(b?)",
- "VEXTRACTI128mr",
- "VEXTRACTI32x4Z256mr(b?)",
- "VEXTRACTI32x4Zmr(b?)",
- "VEXTRACTI32x8Zmr(b?)",
- "VEXTRACTI64x2Z256mr(b?)",
- "VEXTRACTI64x2Zmr(b?)",
- "VEXTRACTI64x4Zmr(b?)",
- "VMOVAPDYmr",
- "VMOVAPDZ128mr(b?)",
- "VMOVAPDZ256mr(b?)",
- "VMOVAPDZmr(b?)",
- "VMOVAPDmr",
- "VMOVAPSYmr",
- "VMOVAPSZ128mr(b?)",
- "VMOVAPSZ256mr(b?)",
- "VMOVAPSZmr(b?)",
- "VMOVAPSmr",
- "VMOVDQA32Z128mr(b?)",
- "VMOVDQA32Z256mr(b?)",
- "VMOVDQA32Zmr(b?)",
- "VMOVDQA64Z128mr(b?)",
- "VMOVDQA64Z256mr(b?)",
- "VMOVDQA64Zmr(b?)",
- "VMOVDQAYmr",
- "VMOVDQAmr",
- "VMOVDQU16Z128mr(b?)",
- "VMOVDQU16Z256mr(b?)",
- "VMOVDQU16Zmr(b?)",
- "VMOVDQU32Z128mr(b?)",
- "VMOVDQU32Z256mr(b?)",
- "VMOVDQU32Zmr(b?)",
- "VMOVDQU64Z128mr(b?)",
- "VMOVDQU64Z256mr(b?)",
- "VMOVDQU64Zmr(b?)",
- "VMOVDQU8Z128mr(b?)",
- "VMOVDQU8Z256mr(b?)",
- "VMOVDQUYmr",
- "VMOVDQUmr",
"VMOVHPDZ128mr(b?)",
"VMOVHPDmr",
"VMOVHPSZ128mr(b?)",
@@ -777,21 +724,6 @@
"VMOVLPDmr",
"VMOVLPSZ128mr(b?)",
"VMOVLPSmr",
- "VMOVNTDQYmr",
- "VMOVNTDQZ128mr(b?)",
- "VMOVNTDQZ256mr(b?)",
- "VMOVNTDQZmr(b?)",
- "VMOVNTDQmr",
- "VMOVNTPDYmr",
- "VMOVNTPDZ128mr(b?)",
- "VMOVNTPDZ256mr(b?)",
- "VMOVNTPDZmr(b?)",
- "VMOVNTPDmr",
- "VMOVNTPSYmr",
- "VMOVNTPSZ128mr(b?)",
- "VMOVNTPSZ256mr(b?)",
- "VMOVNTPSZmr(b?)",
- "VMOVNTPSmr",
"VMOVPDI2DIZmr(b?)",
"VMOVPDI2DImr",
"VMOVPQI(2QI|to64)Zmr(b?)",
@@ -801,16 +733,6 @@
"VMOVSDmr",
"VMOVSSZmr(b?)",
"VMOVSSmr",
- "VMOVUPDYmr",
- "VMOVUPDZ128mr(b?)",
- "VMOVUPDZ256mr(b?)",
- "VMOVUPDZmr(b?)",
- "VMOVUPDmr",
- "VMOVUPSYmr",
- "VMOVUPSZ128mr(b?)",
- "VMOVUPSZ256mr(b?)",
- "VMOVUPSZmr(b?)",
- "VMOVUPSmr",
"VMPTRSTm")>;
def SKXWriteResGroup12 : SchedWriteRes<[SKXPort0]> {